LPC1111FHN33/102'5 NXP Semiconductors, LPC1111FHN33/102'5 Datasheet - Page 485

• Manufacturer Part Number: LPC1111FHN33/102'5
• Description: ARM Microcontrollers - MCU CORTEX-M0 8 KB FL 4 KB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1111FHN33/102'5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1111
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Mounting Style: SMD/SMT
• Interface Type: I2C, SPI, UART
• Number Of Programmable I/os: 42
• Number Of Timers: 4
• Program Memory Type: Flash
• Factory Pack Quantity: 4000

NXP Semiconductors
UM10398
User manual
28.5.5.6.2 Operation
28.5.5.6.3 Restrictions
28.5.5.6.4 Condition flags
28.5.5.6.5 Examples
28.5.5.7.1 Syntax
28.5.5.7.2 Operation
28.5.5.7 REV, REV16, and REVSH
where:
The MUL instruction multiplies the values in the registers specified by Rn and Rm, and
places the least significant 32 bits of the result in Rd. The condition code flags are
updated on the result of the operation, see
The results of this instruction does not depend on whether the operands are signed or
unsigned.
In this instruction:
This instruction:
Reverse bytes.
REV Rd, Rn
REV16 Rd, Rn
REVSH Rd, Rn
where:
Use these instructions to change endianness of data:
REV — converts 32-bit big-endian data into little-endian data or 32-bit little-endian data
into big-endian data.
REV16 — converts two packed 16-bit big-endian data into little-endian data or two packed
16-bit little-endian data into big-endian data.
•
•
•
•
Rd is the destination register.
Rn, Rm are registers holding the values to be multiplied.
MULS R0, R2, R0
Rd is the destination register.
Rn is the source register.
Rd, Rn, and Rm must only specify R0-R7
Rd must be the same as Rm.
updates the N and Z flags according to the result
does not affect the C or V flags.
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
; Multiply with flag update, R0 = R0 x R2
Rev. 12 — 24 September 2012
Section
28–28.5.3.6.
UM10398
© NXP B.V. 2012. All rights reserved.
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