LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 206
LPC1114FHN33/203,5
Manufacturer Part Number
LPC1114FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1113FHN333035.pdf
(538 pages)
Specifications of LPC1114FHN33/203,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1114
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
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NXP Semiconductors
UM10398
User manual
13.5.14 Auto-baud modes
Two auto-baud measuring modes are available which can be selected by the U0ACR
Mode bit. In Mode 0 the baud rate is measured on two subsequent falling edges of the
UART Rx pin (the falling edge of the start bit and the falling edge of the least significant
bit). In Mode 1 the baud rate is measured between the falling edge and the subsequent
rising edge of the UART Rx pin (the length of the start bit).
The U0ACR AutoRestart bit can be used to automatically restart baud rate measurement
if a time-out occurs (the rate measurement counter overflows). If this bit is set, the rate
measurement will restart at the next falling edge of the UART Rx pin.
The auto-baud function can generate two interrupts.
The auto-baud interrupts have to be cleared by setting the corresponding U0ACR
ABTOIntClr and ABEOIntEn bits.
The fractional baud rate generator must be disabled (DIVADDVAL = 0) during auto-baud.
Also, when auto-baud is used, any write to U0DLM and U0DLL registers should be done
before U0ACR register write. The minimum and the maximum baud rates supported by
UART are function of UART_PCLK, number of data bits, stop bits and parity bits.
When the software is expecting an ”AT" command, it configures the UART with the
expected character format and sets the U0ACR Start bit. The initial values in the divisor
latches U0DLM and U0DLM don‘t care. Because of the ”A" or ”a" ASCII coding
(”A" = 0x41, ”a" = 0x61), the UART Rx pin sensed start bit and the LSB of the expected
character are delimited by two falling edges. When the U0ACR Start bit is set, the
auto-baud protocol will execute the following phases:
1. On U0ACR Start bit setting, the baud rate measurement counter is reset and the
2. A falling edge on UART Rx pin triggers the beginning of the start bit. The rate
3. During the receipt of the start bit, 16 pulses are generated on the RSR baud input with
•
•
ratemin
The U0IIR ABTOInt interrupt will get set if the interrupt is enabled (U0IER ABToIntEn
is set and the auto-baud rate measurement counter overflows).
The U0IIR ABEOInt interrupt will get set if the interrupt is enabled (U0IER ABEOIntEn
is set and the auto-baud has completed successfully).
UART U0RSR is reset. The U0RSR baud rate is switched to the highest rate.
measuring counter will start counting UART_PCLK cycles.
the frequency of the UART input clock, guaranteeing the start bit is stored in the
U0RSR.
=
2 P
------------------------ -
16 2 15
All information provided in this document is subject to legal disclaimers.
CLK
Rev. 12 — 24 September 2012
UART baudrate
----------------------------------------------------------------------------------------------------------- -
16
2
+
Chapter 13: LPC111x/LPC11Cxx UART
databits
PCLK
+
paritybits
+
stopbits
UM10398
© NXP B.V. 2012. All rights reserved.
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