LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 100
LPC1114FHN33/203,5
Manufacturer Part Number
LPC1114FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1113FHN333035.pdf
(538 pages)
Specifications of LPC1114FHN33/203,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1114
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
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8.1 How to read this chapter
8.2 Features
8.3 General description
UM10398
User manual
Remark: This chapter applies to parts in the following series (see
The implementation of the I/O configuration registers varies for different LPC1100XL parts
and packages.
packages.
The I/O configuration registers control the electrical characteristics of the pads. The
following features are programmable:
The IOCON registers control the function (GPIO or peripheral function), the input mode,
and the hysteresis of all PIOn_m pins. In addition, the I
different I
can be selected.
•
•
•
•
•
•
•
UM10398
Chapter 8: LPC1100XL series: I/O configuration (IOCONFIG)
Rev. 12 — 24 September 2012
LPC1100XL
Pin function.
Internal pull-up/pull-down resistor or bus keeper function.
Hysteresis.
Analog input or digital mode for pads hosting the ADC inputs.
I
Pseudo open-drain mode for non-I2C pins.
2
C mode for pads hosting the I
2
C-bus modes. If a pin is used as input pin for the ADC, an analog input mode
Table 104
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
shows which IOCON registers are used on the different
2
C-bus function.
2
C-bus pins can be configured for
Table
© NXP B.V. 2012. All rights reserved.
1):
User manual
100 of 538
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