MM912F634DV1AER2 Freescale Semiconductor, MM912F634DV1AER2 Datasheet - Page 272
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MM912F634DV1AER2
Manufacturer Part Number
MM912F634DV1AER2
Description
16-bit Microcontrollers - MCU DUAL LS/HS SWITCH W. LIN
Manufacturer
Freescale Semiconductor
Datasheet
1.MM912G634DV1AE.pdf
(338 pages)
Specifications of MM912F634DV1AER2
Rohs
yes
Core
HCS12
Processor Series
MM912F634
Data Bus Width
16 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
32 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
4.5 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
15
Interface Type
SPI
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
6
Number Of Timers
1
Program Memory Type
Flash
Supply Voltage - Max
4.5 V
Supply Voltage - Min
4.5 V
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Table 350. S12SFTSR32K Register Summary (Normal/Special Mode)
Functional Description and Application Information
4.36.3.2
The Flash IFR is a 128 byte nonvolatile information memory that is read accessible as defined in the SoC Guide. The MCU
memory map places the Flash IFR addresses between Flash IFR base + 0x0000 and 0x007F as shown in
4.36.3.3
The Flash module contains a set of 16 control and status registers located between Flash register base + 0x0000 and 0x000F.
Flash registers are byte and word accessible. A summary of the Flash module registers is given in
descriptions of each register bit are provided in the following sections.
Freescale Semiconductor
Table 348. Flash Configuration Field (continued)
Table 349. Flash IFR Description
Note:
Address Relative to Flash IFR
188.
FCLKDIV
Address Relative to Flash
Register
FCNFG
0x0100
0x0101
0x0102
0x0103
0x0104
FPROT
0x0105
0x0106
FRSV0
FSTAT
FCMD
Name
FSEC
Refer to the SoC Guide for details on how to enable the Flash IFR
0x007C - 0x007F
0x0000 - 0x000D
0x000E - 0x003F
0x0040 - 0x004F
0x0050 - 0x007B
Array Base
Base
0x7F0E
0x7F0F
Flash IFR Map
Register Descriptions
(188)
W
W
W
W
W
W
W
R
R
R
R
R
R
R
KEYEN1
FDIVLD
FPHS4
CBEIE
CBEIF
Bit 7
0
0
(bytes)
(bytes)
Size
Size
14
50
16
44
KEYEN0
1
1
4
PRDIV8
CMDB6
FPHS3
CCIE
CCIF
6
0
Flash Nonvolatile byte
Refer to the SoC Guide
Flash Security byte
Refer to
Wafer lot number, wafer number, X coordinate, Y coordinate
Reserved for wafer test data
Flash memory controller parameters
Reserved
MCU control parameters
KEYACC
CMDB5
FPHS2
FDIV5
PVIOL
Section 4.36.3.3.2, “Flash Security Register
5
0
0
ACCERR
CMDB4
FPHS1
FDIV4
4
0
0
0
CMDB3
FPHS0
FDIV3
Description
Description
3
0
0
0
0
32 kbyte Flash Module (S12SFTSR32KV1)
CMDB2
BLANK
FPLS2
FDIV2
(FSEC)"”
2
0
0
0
Table
CMDB1
FPLS1
350. Detailed
FDIV1
SEC1
Table
1
0
0
0
349.
MM912F634
CMDB0
FPLS0
FDIV0
SEC0
Bit 0
0
0
0
272
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