C8051F961-A-GM Silicon Labs, C8051F961-A-GM Datasheet - Page 391
C8051F961-A-GM
Manufacturer Part Number
C8051F961-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, LCD AES, QFN40
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F961-A-GM
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-40
Mounting Style
SMD/SMT
Number Of Programmable I/os
34
Number Of Timers
4
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SFR Definition 28.3. SMB0ADR: SMBus Slave Address
SFR Page = 0x0; SFR Address = 0xF4
Hardware Slave Address
SLV[6:0]
0x34
0x34
0x34
0x34
0x70
Name
Reset
Bit
7
Type
0
Bit
:
1
SLV[6:0]
Name
GC
7
0
Table 28.4. Hardware Address Recognition Examples (EHACK = 1)
SMBus Hardware Slave Address.
Defines the SMBus Slave Address(es) for automatic hardware acknowledgement.
Only address bits which have a 1 in the corresponding bit position in SLVM[6:0]
are checked against the incoming address. This allows multiple addresses to be
recognized.
General Call Address Enable.
When hardware address recognition is enabled (EHACK = 1), this bit will deter-
mine whether the General Call Address (0x00) is also recognized by hardware.
0: General Call Address is ignored.
1: General Call Address is recognized.
6
0
Slave Address Mask
SLVM[6:0]
0x7F
0x7F
0x7E
0x7E
0x73
5
0
SLV[6:0]
R/W
Rev. 0.5
4
0
GC bit
0
1
0
1
0
Function
3
0
Slave Addresses Recognized by
Hardware
0x34
0x34, 0x00 (General Call)
0x34, 0x35
0x34, 0x35, 0x00 (General Call)
0x70, 0x74, 0x78, 0x7C
2
0
C8051F96x
1
0
R/W
GC
0
0
391
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