C8051F961-A-GM Silicon Labs, C8051F961-A-GM Datasheet - Page 329
C8051F961-A-GM
Manufacturer Part Number
C8051F961-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, LCD AES, QFN40
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F961-A-GM
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-40
Mounting Style
SMD/SMT
Number Of Programmable I/os
34
Number Of Timers
4
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SFR Definition 25.13. PC0CMP0H: PC0 Comparator 0 High (MSB)
SFR Address = 0xE3; SFR Page = 0x2
SFR Definition 25.14. PC0CMP0M: PC0 Comparator 0 Middle
SFR Address = 0xE2; SFR Page = 0x2
SFR Definition 25.15. PC0CMP0L: PC0 Comparator 0 Low (LSB)
SFR Address = 0xE1; SFR Page = 0x2
Note: PC0CMP0L must be written last after writing PC0CMP0M and PC0CMP0H. After writing PC0CMP0L, the
Name
Reset
Name
Reset
Name
Reset
Bit
7:0
Bit
7:0
Bit
7:0
Type
Type
Type
Bit
Bit
Bit
synchronization into the PC clock domain can take 2 RTC clock cycles.
PC0CMP0H[23:16]
PC0CMP0M[15:8]
PC0CMP0L[7:0]
7
0
7
0
7
0
Name
Name
Name
6
0
6
0
6
0
PC0 Comparator 0 High Byte
Bits 23:16 of Counter 0.
PC0 Comparator 0 Middle Byte
Bits 15:8 of Counter 0.
PC0 Comparator 0 Low Byte
Bits 7:0 of Counter 0.
5
0
5
0
5
0
PC0CMP0H[23:16]
PC0CMP0M[15:8]
PC0CMP0L[7:0]
Rev. 0.5
4
0
4
0
4
0
R/W
R/W
R/W
3
0
3
0
3
0
Function
Function
Function
2
0
2
0
2
0
C8051F96x
1
0
1
0
1
0
0
0
0
0
0
0
329
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