MAX11105AUT+TCBG Maxim Integrated, MAX11105AUT+TCBG Datasheet
MAX11105AUT+TCBG
Specifications of MAX11105AUT+TCBG
Related parts for MAX11105AUT+TCBG
MAX11105AUT+TCBG Summary of contents
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... Exposed pad. QSPI is a trademark of Motorola, Inc. MICROWIRE is a registered trademark of National Semiconductor Corp. µMAX is a registered trademark of Maxim Integrated Products, Inc. For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com. MAX11102/03/05/06/10/11/15/16/17 ...
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... SINAD > 68dB MIN TYP 12 Q0.3 Q1 Q1.5 Q0.4 Q0.05 = 0.5MHz) AIN_ 72.5 70.5 72 70.5 73 -85 - 0.99955MHz 2 -84 = 499.56kHz 2 40 2.5 45 -90 = 48MHz, SCLK = +25NC.) A MAX UNITS Bits LSB Q1 LSB Q1 LSB Q3 LSB Q3 LSB LSB LSB dB dB - MHz MHz MHz dB Maxim Integrated ...
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... Digital Input Hysteresis Digital Input Leakage Current Digital Input Capacitance DIGITAL OUTPUT (DOUT) Output High Voltage Output Low Voltage High-Impedance Leakage Current High-Impedance Output Capacitance Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs = V . MAX11102 32MHz, 50% duty cycle, 2Msps. MAX11103: f OVDD DD SCLK = -40NC to +125NC, unless otherwise noted ...
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... Typical A MIN TYP 12 Q0.3 Q1 Q1.5 70 72.5 70 48MHz, SCLK = +25NC.) A MAX UNITS 3 3.3 2.6 mA 0.33 0. LSB 16 Cycle MAX UNITS Bits LSB Q1 LSB Q1 LSB Q3 LSB Q3 LSB dB dB Maxim Integrated ...
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... Digital Input Capacitance DIGITAL OUTPUT (DOUT) Output High Voltage Output Low Voltage High-Impedance Leakage Current High-Impedance Output Capacitance POWER SUPPLY Positive Supply Voltage Positive Supply Current (Full-Power Mode) Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs = 10pF, T DOUT SYMBOL CONDITIONS THD f = 500kHz AIN ...
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... Typical A MIN TYP 1.48 1.3 0 2.5 = 10pF -40NC to +125NC, DOUT A MIN TYP 10 Q0.5 0 Q0.5 Q0.05 Q0.05 61 61.8 61 61.8 -83 75 MAX UNITS LSB Cycle MAX UNITS Bits LSB Q0.4 LSB Q0.4 LSB Q1 LSB Q1 LSB LSB LSB Maxim Integrated ...
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... Digital Input-Low Voltage Digital Input Hysteresis Digital Input Leakage Current Digital Input Capacitance DIGITAL OUTPUT (DOUT) Output-High Voltage Output-Low Voltage High-Impedance Leakage Current High-Impedance Output Capacitance Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs = 48MHz, 50% duty cycle, 3Msps; C OVDD DD SCLK = +25NC.) ...
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... MIN TYP 2.2 1.5 1.98 1 2.2V 0.17 REF 2.5 = 48MHz, 50% duty cycle, 3Msps. SCLK = +25NC.) A MIN TYP 10 Q0.5 Q0.3 Q0.7 Q0. -40NC to +125NC, A MAX UNITS 3 3 LSB 16 Cycle MAX UNITS Bits LSB Q1 LSB Q1 Q1.65 LSB Q1.2 Q1.4 LSB Q1 LSB Maxim Integrated ...
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... Input Leakage Current Input Capacitance DIGITAL INPUTS (SCLK, CS, CHSEL) Digital Input-High Voltage Digital Input-Low Voltage Digital Input Hysteresis Digital Input Leakage Current Digital Input Capacitance Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs = 32MHz, 50% duty cycle, 2Msps. MAX11117: f SYMBOL CONDITIONS = 1MHz, MAX11110: f ...
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... Percentage of clock period (Note Figure Figure 4 (Note 2) 8 Conversion cycle (Note 2) = 48MHz, 50% duty cycle, 3Msps. SCLK = +25NC.) A MIN TYP MAX 0. 0. Q1.0 4 2.2 3.6 3.55 2.6 1.98 1.48 1 Maxim Integrated UNITS LSB Cycle ...
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... ANALOG INPUT (AIN1, AIN2) Input Voltage Range Input Leakage Current Input Capacitance EXTERNAL REFERENCE INPUT (REF) Reference Input Voltage Range Reference Input Leakage Current Reference Input Capacitance Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs = 48MHz, 50% duty cycle, 3Msps, C OVDD ...
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... DOUT MIN TYP 0. OVDD 0. OVDD 0.001 2 0. OVDD 4 2.2 1.5 1.98 1.3 = 2.2V 0.17 REF 2.5 = -40NC to +125NC, A MAX UNITS V 0. OVDD 0. OVDD Q1 3 3 LSB 16 Cycle Maxim Integrated ...
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... Aperture Delay Aperture Jitter Serial-Clock Frequency ANALOG INPUT (AIN) Input Voltage Range Input Leakage Current Input Capacitance DIGITAL INPUTS (SCLK, CS) Digital Input High Voltage Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs = 32MHz, 50% duty cycle, 2Msps. MAX11116: f SYMBOL CONDITIONS INL DNL ...
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... Figure 4 (Note 2) 8 Conversion cycle (Note 2) = 48MHz, 50% duty cycle, 3Msps. SCLK = +25NC.) A MIN TYP MAX 0. 0. 0.001 Q1.0 4 2.2 3.6 3.55 2.6 1.98 1.48 1 Maxim Integrated UNITS LSB Cycle ...
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... IMPEDANCE t 3 Figure 1. Interface Signals for Maximum Throughput, 12-Bit Devices t 4 SCLK DOUT OLD DATA Figure 2. Setup Time After SCLK Falling Edge Figure 4. SCLK Falling Edge DOUT Three-State Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ...
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... HISTOGRAM FOR 30,000 CONVERSIONS 35,000 30,000 25,000 20,000 15,000 10,000 5000 0 2046 2047 2048 2049 2050 DIGITAL CODE OUTPUT THD vs. ANALOG INPUT FREQUENCY - 3Msps S -70 -80 -90 -100 -110 -120 0 300 600 900 1200 f (kHz 110 125 1500 Maxim Integrated ...
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... FREQUENCY (kHz) ANALOG SUPPLY CURRENT vs. TEMPERATURE 3 3.6V DD 3.2 2.9 2 3. 2.2V DD 2.0 -40 -25 -10 5 TEMPERATURE (˚C) Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs µMAX Typical Operating Characteristics (continued) 600 900 1200 1500 f (kHz -110.3dB HD2 750 1000 1250 1500 ...
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... S 0.5 0 -0.5 -1.0 0 1000 2000 3000 4000 DIGITAL OUTPUT CODE GAIN ERROR vs. TEMPERATURE -40 -25 - 110 TEMPERATURE (˚C) SNR AND SINAD vs. ANALOG INPUT FREQUENCY 73 2.0Msps S 73.0 SNR 72.5 SINAD 72.0 71.5 0 200 400 600 800 f (kHz) IN 125 1000 Maxim Integrated ...
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... ANALOG SUPPLY CURRENT vs. TEMPERATURE 2 3. 3.0V DD 2.2 2 2.2V DD 1.8 1.6 -40 -25 -10 5 TEMPERATURE (˚C) Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs SOT Typical Operating Characteristics (continued) 400 600 800 1000 f (kHz 100 R ( 110 125 SFDR vs ...
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... OVDD 7 CHSEL AIN EP* Pin Description FUNCTION Bypass REF to AGND with 10FF || 0.1FF REF DD. with a 10FF || 0.1FF capacitor to GND also defines the signal range MAX11105 MAX11110 MAX11115 5 DOUT MAX11116 MAX11117 4 SCLK SOT23 DD Maxim Integrated ...
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... CONTROL SCLK LOGIC SAR CHSEL AIN1 MUX CDAC AIN2 REF AGND +3V ANALOG INPUTS +2.5V +3V ANALOG INPUT Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs OVDD MAX11102/MAX11103/ MAX11106/MAX11111 OUTPUT DOUT BUFFER GND (EP) V OVDD DD AIN1 MAX11102 SCLK MAX11103 MAX11106 AIN2 MAX11111 AGND ...
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... The ing the 16th clock cycle. with Serial Interface HIGH IMPEDANCE HIGH IMPEDANCE Maxim Integrated ...
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... DOUT HIGH IMPEDANCE Figure 7. Normal Mode Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs The source impedance of the external driving stage in conjunction with the sampling switch resistance affects the settling performance. The THD vs. Input Resistance graph in the Typical Operating Characteristics shows THD sensitivity as a function of the signal source imped- ance ...
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... SCLK) is 333ns. The power-up time for 2Msps operation (32MHz SCLK) is 500ns HIGH IMPEDANCE VALID DATA Entering Power-Down Mode Exiting Power-Down Mode HIGH IMPEDANCE Power-Down Mode Maxim Integrated ...
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... S Figure 12. Supply Current vs. Sample Rate (Device Powered Down Between Conversions, 3Msps Devices) Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs The user can also power down the ADC between con- versions by using the power-down mode. Figure 12 shows for the 3Msps device that as the sample rate is ...
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... 1/f SAMPLE t CONVERT Applications Information Layout, Grounding, and Bypassing , OVDD, and REF to ground with DD Choosing an Input Amplifier DATA CHANNEL AIN2 ACQ Maxim Integrated ...
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... AIN2 4 MAX4430 0.1µF Figure 17. Typical Application Circuit Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs ADC For devices using an external reference, the choice of the reference determines the output accuracy of the ADC. An ideal voltage reference provides a perfect initial accuracy and maintains the reference voltage indepen- dent of changes in load current, temperature, and time ...
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... Spurious-Free Dynamic Range (SFDR) dynamic figure of merit that indicates the low- Full-Power Bandwidth Full-Linear Bandwidth Intermodulation Distortion ) are applied into the device. Intermodulation 2 (SINAD) RMS ) RMS –V are 2 5 and f . The 1 2 Maxim Integrated ...
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... MAX11116AUT+ 6 SOT23 MAX11117AUT+ Note: All devices are specified over the -40°C to +125°C operating temperature range. +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Chip Information PROCESS: CMOS Maxim Integrated MAX11102/03/05/06/10/11/15/16/17 2Msps/3Msps, Low-Power, Serial 12-/10-/8-Bit ADCs Ordering Information (continued) BITS SPEED (Msps ...
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... Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. 30 2012 Maxim Integrated © DESCRIPTION Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000 The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc. Revision History PAGES CHANGED — 1 –30 ...