S9S12G48F0MLH Freescale Semiconductor, S9S12G48F0MLH Datasheet - Page 40
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S9S12G48F0MLH
Manufacturer Part Number
S9S12G48F0MLH
Description
16-bit Microcontrollers - MCU 16Bit 48KFlash 4096RAM MSCAN
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G48F0MLH
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
48 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12G48F0MLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
S9S12G48F0MLHR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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8-Bit PWM Channels
ADC channels
DAC0
DAC1
ACMP
Total GPIO
Device Overview MC9S12G-Family
1.2.2
On-chip modules available within the family include the following features:
1.3
The following sections provide more details of the modules implemented on the MC9S12G-Family family.
42
Peripheral
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S12 CPU core
Up to 240 Kbyte on-chip flash with ECC
Up to 4 Kbyte EEPROM with ECC
Up to 11 Kbyte on-chip SRAM
Phase locked loop (IPLL) frequency multiplier with internal filter
4–16 MHz amplitude controlled Pierce oscillator
1 MHz internal RC oscillator
Timer module (TIM) supporting up to eight channels that provide a range of 16-bit input capture,
output compare, counter, and pulse accumulator functions
Pulse width modulation (PWM) module with up to eight x 8-bit channels
Up to 16-channel, 10 or 12-bit resolution successive approximation analog-to-digital converter
(ADC)
Up to two 8-bit digital-to-analog converters (DAC)
Up to one 5V analog comparator (ACMP)
Up to three serial peripheral interface (SPI) modules
Up to three serial communication interface (SCI) modules supporting LIN communications
Up to one multi-scalable controller area network (MSCAN) module (supporting CAN protocol
2.0A/B)
On-chip voltage regulator (VREG) for regulation of input supply and all internal voltages
Autonomous periodic interrupt (API)
Precision fixed voltage reference for ADC conversions
Optional reference voltage attenuator module to increase ADC accuracy
Module Features
Chip-Level Features
20 TSSOP
4 = 0 … 3
6 = 0 … 5
Yes
—
—
14
Table 1-2. Maximum Peripheral Availability per Package
MC9S12G Family Reference Manual,
6 = 0 … 5
8 = 0 … 7
32 LQFP
Yes
26
—
—
12 = 0 … 11
8 = 0 … 7
48 LQFP,
48 QFN
Yes
Yes
Yes
40
16 = 0 … 15
8 = 0 … 7
Rev.1.23
64 LQFP
Yes
Yes
Yes
54
16 = 0 … 15
100 LQFP
8 = 0 … 7
Yes
Yes
—
86
Freescale Semiconductor
16 = 0 … 15
KGD (Die)
8 = 0 … 7
Yes
Yes
86
—
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