IDTAMB0480A5RJ IDT, Integrated Device Technology Inc, IDTAMB0480A5RJ Datasheet - Page 11

• Manufacturer Part Number: IDTAMB0480A5RJ
• Description: IC MEMORY BUFFER ADV DIMM 655BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDTAMB0480A5RJ

• Supply Voltage: 1.425 V ~ 1.59 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: *
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Logic Type: -
• Number Of Bits: -
• Lead Free Status / RoHS Status: Compliant, Contains lead / RoHS non-compliant
• Other names: AMB0480A5RJ

PIN DESCRIPTION (CONT.)
IDTAMB0480
ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM
Clocking
System Management
Reset
Miscellaneous Test
Power Supplies
Other Pins
Other No Connect Pins
TESTLO (5 pins)
V
TESTLO_AC20
TESTLO_AB20
V
RFU (18 pins)
NC (129 pins)
TEST (4 pins)
CC
V
V
SS
V
CC
DD
PLLTSTO
V
FBD (8 pins)
V
BFUNC
SA[2:0]
RESET
CC
Signal
SS
(156 pins)
DD
SCK
SCK
SDA
SCL
(24 pins)
(24 pins)
A PLL
A PLL
SPD
Type
N C
N C
N C
I/O
I/O
O
A
A
A
A
A
A
A
A
A
A
I
I
I
Description
AMB Clock: This is one of the two differential reference clock inputs to the Phase Locked Loop in the AMB core. Phase Locked Loops in
the AMB will shift this to all frequencies required by the core, DDR channels, and FBD Channel.
AMB Clock Complement: This is the other differential reference clock input to the Phase Locked Loop in the AMB core. Phase Locked Loops
in the AMB will shift this to all frequencies required by the core, DDR channels, and FBD Channel.
PLL Clock Observability Output: This pin can be used to observe VCO, reference clock, core clock, etc. For system debug and design
characterization.
V
V
SMBus Clock
SMBus Address/Data
DIMM Select ID
Power Good Reset
Pin for debug and test. Must be floated on DIMM.
Pin for debug and test. Connected to two resistors. One resistor is connected to V
Pin for debug and test. Connected to two resistors. One resistor is connected to V
1.5V nominal supply for core I/O
1.5V nominal supply for FBD high speed I/O
1.8V nominal supply for DDR I/O
Ground
3.3V nominal supply for SMB receivers and ESD diodes
Buffer Function Bit: When BFUNC = 0, AMB is used as a regular buffer on FBDIMM. When BFUNC = 1, AMB is used as either a repeater
or a buffer for LAI function. On FB-DIMM, BFUNC is tied to Ground
Reserved for Future Use. Must be floated on DIMM. RFU pins denoted by “a” are reserved for forwarded clocks in future AMB
implementations.
No Connect pins
Pin for debug and test. Must be tied to Ground on DIMM
CC
SS
: PLL Analog Voltage for the core PLL
: PLL Analog Voltage for the core PLL
11
CC
CC
FBD, the other resistor is connected to V
FBD, the other resistor is connected to V
COMMERCIAL TEMPERATURE RANGE
SS
SS
.
.