SSTUAF32866BHLF IDT, Integrated Device Technology Inc, SSTUAF32866BHLF Datasheet - Page 23

• Manufacturer Part Number: SSTUAF32866BHLF
• Description: IC REGIST BUFF 25BIT DDR2 96-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of SSTUAF32866BHLF

• Logic Type: 1:2 Configurable Registered Buffer
• Supply Voltage: 1.7 V ~ 1.9 V
• Number Of Bits: 25, 14
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 96-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Timing
NOTES:
1.After RESET is switched from LOW to HIGH, all data and PAR_IN inputs signals must be set and held low for a minimum time of tactmax, to avoid false
error.
2.PAR_IN is driven from PPO of the first SSTUAF32866 device.
3.If the data is clocked in on the n clock pulse, the QERR output signal will be generated on the n+2 clock pulse, and it will be valid on the n+3 clock pulse.
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
Timing Diagram for the Second SSTUAF32866B (1:2 Register-B Configuration) Device Used in a Pair; C0 = 1, C1 = 1, RESET
ICSSSTUAF32866B
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
D1 - D14
(not used)
Q1 - Q14
RESET
PARIN
QERR
DCS
CSR
CLK
CLK
PPO
(1)
(1,2)
(3)
t
ACT
H, L, or X
n
t
SU
t
PDM,
Switches from L to H
CLK to Q
t
PDMSS
Data to QERR Latency
n +1
23
CLK to QERR
t
H
t
PHL
n + 2
CLK to PPO
t
SU
COMMERCIAL TEMPERATURE GRADE
t
n + 3
PD
H or L
CLK to QERR
t
t
PHL,
H
ICSSSTUAF32866B
t
PLH
n + 4
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