IDT74SSTUBF32866BBFG8 IDT, Integrated Device Technology Inc, IDT74SSTUBF32866BBFG8 Datasheet - Page 26

• Manufacturer Part Number: IDT74SSTUBF32866BBFG8
• Description: IC BUFFER 25BIT CONF DDR2 96BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT74SSTUBF32866BBFG8

• Logic Type: 1:1, 1:2 Configurable Registered Buffer
• Supply Voltage: 1.7 V ~ 1.9 V
• Number Of Bits: 25, 14
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 96-BGA
• Logic Family: SSTU
• Logical Function: Registered Buffer
• Number Of Elements: 1
• Number Of Inputs: 25
• Number Of Outputs: 25
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 410(Min)MHz
• Mounting: Surface Mount
• Pin Count: 96
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74SSTUBF32866BBFG8

Test Circuits and Waveforms (V
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
CLK Inputs
Voltage and Current Waveforms Inputs Active and Inactive
IDT74SSTUBF32866B
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
CLK
Input
CLK
LVCMOS
Input
RESET
I
DD
Input
Voltage Waveforms - Setup and Hold Times
Voltage Waveforms - Pulse Duration
R
Test Point
Test Point
L =
T
t
INACT
L
100
= 50
Simulation Load Circuit
V
V
DD
V
10%
REF
ICR
t
/2
SU
CLK
CLK
DUT
Times
Out
t
W
V
ICR
t
H
T
L
= 350ps, 50
C
L
= 30 pF
V
DD
V
V
ICR
REF
/2
DD
t
ACT
90%
V
DD
= 1.8V ± 0.1V)
V
0V
Test Point
V
R
R
V
V
V
DD
ID
L
L
= 1K
= 1K
ID
IH
IL
26
NOTES:
1. C
2. I
Io = 0mA
3. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 10MHz, Zo = 50Ω , input slew rate = 1 V/ns
±20% (unless otherwise specified).
4. The outputs are measured one at a time with one transition per
measurement.
5. V
6. V
V
7. V
V
8. V
9. t
CLK Inputs
IH
IL
Output
= GND for LVCMOS input.
DD
PLH
= V
IL
ID
LVCMOS
TT
IH
L
CLK
CLK
RESET
= V
Output
includes probe and jig capacitance.
= 600mV.
tested with clock and data inputs held at V
= V
Input
= V
DD
and t
Voltage Waveforms - Propagation Delay Times
Voltage Waveforms - Propagation Delay Times
REF
REF
for LVCMOS input.
REF
t
PHL
PLH
Z
Z
- 250mV (AC voltage levels) for differential inputs.
O
O
+ 250mV (AC voltage levels) for differential inputs.
= V
= 50
= 50
are the same as t
Production-Test Load Circuit
DD
V
ICR
COMMERCIAL TEMPERATURE GRADE
/2
Test
Point
V
Test
Point
TT
CLK
CLK
DUT
V
DD
Out
IDT74SSTUBF32866B
/2
PDM
Test
Point
.
Z
O
= 50
V
t
RPHL
ICR
V
TT
DD
V
t
PHL
TT
or GND, and
V
DD
V
V
V
/2
ID
R
OH
OL
V
V
V
V
7067/13
L
OH
OL
IH
IL
= 50