IS46TR16128A-125KBLA1-TR ISSI, IS46TR16128A-125KBLA1-TR Datasheet - Page 64

• Manufacturer Part Number: IS46TR16128A-125KBLA1-TR
• Description: DRAM 2G, 1.5V, 1600MT/s 128Mx16 DDR3
• Manufacturer: ISSI

Specifications of IS46TR16128A-125KBLA1-TR

• Rohs: yes
• Data Bus Width: 16 bit
• Organization: 128 M x 16
• Package / Case: FBGA-96
• Memory Size: 2 Gbit
• Maximum Clock Frequency: 933 MHz
• Access Time: 13.125 ns
• Supply Voltage - Max: 1.575 V
• Supply Voltage - Min: 1.425 V
• Maximum Operating Current: 70 mA
• Maximum Operating Temperature: + 95 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT

IS43/46TR16128A, IS43/46TR16128AL,
IS43/46TR82560A, IS43/46TR82560AL
Minimum CKE low width for Self Refresh entry
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. 00A
11/14/2012
Timing of WR command to Power Down entry
Timing of WR command to Power Down entry
ODT high time without write command or with
Valid Clock Requirement before Self Refresh
Timing of RD/RDA command to Power Down
Exit Precharge Power Down with DLL frozen
ODT high time with Write command and BL8
command; Exit Precharge Power Down with
Timing of PRE or PREA command to Power
Valid Clock Requirement after Self Refresh
RTT_Nom and RTT_WR turn-off time from
Exit Self Refresh to commands requiring a
Exit Power Down with DLL on to any valid
Timing of WRA command to Power Down
Timing of WRA command to Power Down
Asynchronous RTT turn-on delay (Power-
Asynchronous RTT turn-off delay (Power-
Timing of MRS command to Power Down
Entry (SRE) or Power-Down Entry (PDE)
Timing of ACT command to Power Down
Timing of REF command to Power Down
Exit (SRX) or Power-Down Exit (PDX) or
DLL frozen to commands not requiring a
to commands requiring a locked DLL
entry (BL8OTF, BL8MRS, BC4OTF)
Power Down Entry to Exit Timing
(BL8OTF, BL8MRS, BC4OTF)
Command pass disable delay
RTT dynamic change skew
CKE minimum pulse width
write command and BC4
Down with DLL frozen)
Down with DLL frozen)
Power Down Timings
ODTLoff reference
entry (BC4MRS)
ODT Timings
to exit timing
RTT turn-on
Down entry
locked DLL
locked DLL
(BC4MRS)
Parameter
Reset Exit
entry
entry
entry
entry
tWRAPDEN
tWRAPDEN
tMRSPDEN
tACTPDEN
tREFPDEN
tWRPDEN
tWRPDEN
tPRPDEN
tRDPDEN
tAONPD
tCKESR
tCKSRE
tCKSRX
tCPDED
tAOFPD
tXSDLL
tXPDLL
Symbol
ODTH4
ODTH8
tAON
tCKE
tAOF
tADC
tXP
tPD
tCKEmin.: max(3nCK
DDR3/DDR3L-1333
tWRPDENmin.: WL + 4 + (tWR / tCK(avg))
tWRPDENmin.: WL + 2 + (tWR / tCK(avg))
Min.
-250
0.3
0.3
2
2
tCKEmax.: -
tWRAPDENmin.: WL + 2 +WR + 1
tCKESRmin.: tCKE(min) + 1 nCK
5.625ns)
tCKSREmin.: max(5 nCK, 10 ns)
tCKSRXmin.: max(5 nCK, 10 ns)
tXPDLLmin.: max(10nCK, 24ns)
tWRAPDENmin.: WL+4+WR+1
tMRSPDENmin.: tMOD(min)
tXPmin.: max(3nCK, 6ns)
tXSDLLmin.: tDLLK(min)
tRDPDENmin.: RL+4+1
tPDmin.: tCKE(min)
tWRAPDENmax.: -
tWRAPDENmax.: -
tMRSPDENmax.: -
tACTPDENmax.: -
tREFPDENmax.: -
tACTPDENmin.: 1
tREFPDENmin.: 1
tPDmax.: 9*tREFI
tWRPDENmax.: -
tWRPDENmax.: -
Max.
tPRPDENmax.: -
tRDPDENmax.: -
tPRPDENmin.: 1
tCPDEDmax.: -
tCKESRmax.: -
tCKSREmax.: -
tCKSRXmax.: -
tCPDEDmin.: 1
tXSDLLmax.: -
tXPDLLmax.: -
ODTH4max.: -
ODTH8max.: -
ODTH4min.: 4
ODTH8min.: 6
250
8.5
8.5
0.7
0.7
tXPmax.: -
tCKEmin.: max(3nCK
DDR3/DDR3L-1600
Min.
-225
0.3
0.3
tCKEmax.: -
2
2
5ns)
Max.
225
8.5
8.5
0.7
0.7
tCK(avg)
tCK(avg)
Units
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
nCK
ns
ns
ps
64
Notes
7,f
8,f