ST72C334J4TAE STMicroelectronics, ST72C334J4TAE Datasheet - Page 18

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ST72C334J4TAE

Manufacturer Part Number
ST72C334J4TAE
Description
8-bit MCU for automotive with single voltage Flash/ROM memory, ADC, 16-bit timers, SPI, SCI interfaces
Manufacturer
STMicroelectronics
Datasheet
ST72334xx-Auto, ST72314xx-Auto, ST72124Jx-Auto
5 FLASH PROGRAM MEMORY
5.1 INTRODUCTION
Flash devices have a single voltage non-volatile
Flash memory that may be programmed in-situ (or
plugged in a programming tool) on a byte-by-byte
basis.
5.2 MAIN FEATURES
5.3 STRUCTURAL ORGANIZATION
The Flash program memory is organized in a sin-
gle 8-bit wide memory block which can be used for
storing both code and data constants.
The Flash program memory is mapped in the up-
per part of the ST7 addressing space and includes
the reset and interrupt user vector area.
5.4 IN-SITU PROGRAMMING (ISP) MODE
The Flash program memory can be programmed
using Remote ISP mode. This ISP mode allows
the contents of the ST7 program memory to be up-
dated using a standard ST7 programming tools af-
ter the device is mounted on the application board.
This feature can be implemented with a minimum
number of added components and board area im-
pact.
An example Remote ISP hardware interface to the
standard ST7 programming tool is described be-
low. For more details on ISP programming, refer to
the ST7 Programming Specification.
Remote ISP Overview
The Remote ISP mode is initiated by a specific se-
quence on the dedicated ISPSEL pin.
The Remote ISP is performed in three steps:
Remote ISP hardware configuration
In Remote ISP mode, the ST7 has to be supplied
with power (V
cillator and application crystal circuit for example).
18/150
– Selection of the RAM execution mode
– Download of Remote ISP code in RAM
– Execution of Remote ISP code in RAM to pro-
Remote In-Situ Programming (ISP) mode
Up to 16 bytes programmed in the same cycle
MTP memory (Multiple Time Programmable)
Readout memory protection against piracy
gram the user program into the Flash
DD
and V
SS
) and a clock signal (os-
This mode needs five signals (plus the V
if necessary) to be connected to the programming
tool. This signals are:
If any of these pins are used for other purposes on
the application, a serial resistor has to be imple-
mented to avoid a conflict if the other device forces
the signal level.
Figure 5
standard ST7 programming tool. For more details
on the pin locations, refer to the device pinout de-
scription.
Figure 5. Typical Remote ISP Interface
5.5 MEMORY READOUT PROTECTION
The readout protection is enabled through an op-
tion bit.
For Flash devices, when this option is selected,
the program and data stored in the Flash memory
are protected against readout piracy (including a
re-write protection). When this protection option is
removed the entire Flash program memory is first
automatically erased. However, the EEPROM
data memory (when available) can be protected
only with ROM devices.
– RESET: device reset
– V
– ISPCLK: ISP output serial clock pin
– ISPDATA: ISP input serial data pin
– ISPSEL: Remote ISP mode selection. This pin
C
L0
must be connected to V
board through a pull-down resistor.
SS
XTAL
ST7
: device ground power supply
shows a typical hardware interface to a
C
L1
ISPDATA
ISPCLK
ISPSEL
RESET
TO PROGRAMMING TOOL
HE10 CONNECTOR TYPE
V
SS
SS
on the application
10KΩ
APPLICATION
DD
47KΩ
signal
1

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