CD4514BCN Fairchild Semiconductor, CD4514BCN Datasheet

IC DECODER LATCH/4-16 4BIT 24DIP

CD4514BCN

Manufacturer Part Number
CD4514BCN
Description
IC DECODER LATCH/4-16 4BIT 24DIP
Manufacturer
Fairchild Semiconductor
Series
4000Br
Type
Decoderr
Datasheet

Specifications of CD4514BCN

Circuit
1 x 4:16
Independent Circuits
1
Current - Output High, Low
8.8mA, 8.8mA
Voltage Supply Source
Dual Supply
Voltage - Supply
3 V ~ 15 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
24-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
4514
4514B

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CD4514BCN
Quantity:
3
Part Number:
CD4514BCN
Manufacturer:
NS/国半
Quantity:
20 000
© 2004 Fairchild Semiconductor Corporation
CD4514BCWM
CD4514BCN
CD4515BCWM
(Note 1)
CD4515BCN
CD4514BC • CD4515BC
4-Bit Latched/4-to-16 Line Decoders
General Description
The CD4514BC and CD4515BC are 4-to-16 line decoders
with latched inputs implemented with complementary MOS
(CMOS) circuits constructed with N- and P-channel
enhancement mode transistors. These circuits are prima-
rily used in decoding applications where low power dissipa-
tion and/or high noise immunity is required.
The CD4514BC (output active high option) presents a logi-
cal “1” at the selected output, whereas the CD4515BC pre-
sents a logical “0” at the selected output. The input latches
are R–S type flip-flops, which hold the last input data pre-
sented prior to the strobe transition from “1” to “0”. This
input data is decoded and the corresponding output is acti-
vated. An output inhibit line is also available.
Ordering Code:
Note 1: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Package Number
M24B
M24B
N24A
N24A
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide
DS005994
Top View
Features
Wide supply voltage range:
High noise immunity: 0.45 V
Low power TTL: fan out of 2
Low quiescent power dissipation:
Single supply operation
Input impedance
Plug-in replacement for MC14514, MC14515
compatibility: driving 74L
0.025 W/package @ 5.0 V
Package Diagram
10
12
typically
October 1987
Revised January 2004
DD
DC
3.0V to 15V
(typ.)
www.fairchildsemi.com

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CD4514BCN Summary of contents

Page 1

... Ordering Code: Order Number Package Number CD4514BCWM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide CD4514BCN N24A 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide CD4515BCWM 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide M24B ...

Page 2

Truth Table Inhibit Don’t ...

Page 3

Absolute Maximum Ratings (Note 3) DC Supply Voltage ( Input Voltage ( Storage Temperature Range ( Power Dissipation ( Dual-In-Line Small Outline Lead Temperature ( (Soldering, 10 ...

Page 4

AC Electrical Characteristics 50 pF All types unless otherwise specified Symbol Parameter Transition Times THL TLH Propagation Delay Times PLH PHL t ...

Page 5

AC Test Circuit and Switching Time Waveforms FIGURE 1. 5 www.fairchildsemi.com ...

Page 6

Applications Two CD4512 8-channel data selectors are used here with the CD4514B 4-bit latch/decoder to effect a complex data routing system. A total of 16 inputs from data registers are selected and transferred via a 3-STATE data bus to a ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M24B 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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