E28F320J5100 Intel, E28F320J5100 Datasheet - Page 36

• Manufacturer Part Number: E28F320J5100
• Manufacturer: Intel

INTEL
36
Status Command
Erase Block
Issue Read
Time-Out?
®
Yes
StrataFlash™ MEMORY TECHNOLOGY, 32 AND 64 MBIT
No
No
0=No
Issue Erase Command 28H
Issue Block Queue Erase
Read Extended Status
Command 28H, Block
Write Confirm D0H
Block(s) Complete
Device Supports
Check if Desired
Read Extended
Status Register
Status Register
Is Queue Full?
Block Address
Block Address
Set Time-Out
Erase Flash
Full Status
Available?
Is Queue
Queuing
Address
Register
Another
Another
XSR.7=
XSR.7=
Erase?
Erase?
SR.7 =
Block
Block
Read
Start
0=Yes
Yes
Yes
1=Yes
No
1
Figure 9. Block Erase Flowchart
0
1=No
Suspend Erase
Yes
No
Issue Single Block Erase
Command 20H, Block
Write Confirm D0H
Block Address
Yes
Address
No
1. The Erase Confirm byte must follow Erase Setup when
the Erase Queue status (XSR.7) = 0.
Full status check can be done after all erase and write
sequences complete. Write FFH after the last operation to
reset the device to read array mode.
Erase Loop
Write (Note 1)
Suspend
Operation
Standby
Standby
Standby
Write
Read
Write
Read
Read
Bus
Erase Block
Erase Block
Command
Confirm
Erase
PRELIMINARY
Data = 28H or 20H
Addr = Block Address
XSR.7 = Valid
Addr = X
Check XSR.7
1 = Erase Queue Avail.
0 = No Erase Queue Avail.
Data = 28H
Addr = Block Address
SR.7 = Valid; SR.6 - 0 = X
With the device enabled,
Addr = X
Check XSR.7
1 = Erase Queue Avail.
0 = No Erase Queue Avail.
Data = D0H
Addr = X
Status register data
With the device enabled,
Addr = X
Check SR.7
1 = WSM Ready
0 = WSM Busy
OE# low updates SR
OE# low updates SR
Comments
0606_09