IC41SV4105-100J ICSI [Integrated Circuit Solution Inc], IC41SV4105-100J Datasheet - Page 2

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IC41SV4105-100J

Manufacturer Part Number
IC41SV4105-100J
Description
1Mx4 bit Dynamic RAM with Fast Page Mode
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
1M x 4 (4−MBIT) DYNAMIC RAM
WITH FAST PAGE MODE
IC41SV4105
2
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
PIN CONFIGURATION
20 (26) Pin SOJ, TSOP-2
FEATURES
• Fast Page Mode Access Cycle
• TTL compatible inputs and outputs
• Refresh Interval:
• Refresh Mode: RAS-Only,
• JEDEC standard pinout
• Single power supply:
-- 1,024 cycles/16 ms
CAS-before-RAS (CBR), and Hidden
1.9V − − − − − 2.4V
VCC
RAS
I/O0
I/O1
WE
A9
A0
A1
A2
A3
1
2
3
4
5
9
10
11
12
13
26
25
24
23
22
18
17
16
15
14
GND
I/O3
I/O2
CAS
OE
A8
A7
A6
A5
A4
KEY TIMING PARAMETERS
DESCRIPTION
The
CMOS Dynamic Random Access Memory. The Fast Page
Mode allows 1,024 random accesses within a single row with
access cycle time as short as 20 ns per 4-bit word.
These features make the 4105 Series ideally suited for digital
signal processing, and low power portable audio applications.
The 4105 Series is packaged in a 20-pin 300mil SOJ and a 20
pin TSOP-2
Parameter
RAS Access Time (t
CAS Access Time (t
Column Address Access Time (t
Fast Page Mode Cycle Time (t
Read/Write Cycle Time (t
ICSI
PIN DESCRIPTIONS
I/O0-3
A0-A9
WE
OE
RAS
CAS
Vcc
GND
4105 Series is a 1,048,576 x 4-bit high-performance
Address Inputs
Write Enable
Output Enable
Row Address Strobe
Column Address Strobe
Power
Ground
Data Inputs/Outputs
CAC
RAC
)
)
RC
)
Integrated Circuit Solution Inc.
PC
AA
)
)
-50
50
14
25
20
90
130 180
-70 -100 Unit
Preliminary
70
20
35
45
DR032-0A 10/29/2001
100
25
50
60
ns
ns
ns
ns
ns

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