DM9000_09 DAVICOM [Davicom Semiconductor, Inc.], DM9000_09 Datasheet - Page 30

• Manufacturer Part Number: DM9000_09
• Description: ISA to Ethernet MAC Controller with Integrated 10/100 PHY
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

8.10 10BASE-T Configuration/Status (10BTCSR) - 18
Final
Version: DM9000-DS-F03
April 23, 2009
18.10-18.
18.15
18.14
18.13
18.12
18.11
18.0
Bit
1
RESERVED
RESERVED
SQUELCH
Bit Name
LP_EN
JABEN
POLR
HBE
Default
1, RW
1, RW
1, RW
0, RO
0, RO
0, RO
1,RW
Reserved
Write as 0, ignore on read
Link Pulse Enable
1 = Transmission of link pulses enabled
0 = Link pulses disabled, good link condition forced
This bit is valid only in 10Mbps operation
Heartbeat Enable
1 = Heartbeat function enabled
0 = Heartbeat function disabled
When the PHY is configured for full duplex operation, this bit will be
ignored (the collision/heartbeat function is invalid in full duplex
mode)
Squelch Enable
1 = normal squelch
0 = low squelch
Jabber Enable
Enables or disables the Jabber function when the PHY is in
10BASE-T full duplex or 10BASE-T transceiver loopback mode
1 = Jabber function enabled
0 = Jabber function disabled
Reserved
Write as 0, ignore on read
Polarity reversed
When this bit is set to 1, it indicates that the 10Mbps cable polarity is
reversed. This bit is set and cleared by 10BASE-T module
automatically
ISA to Ethernet MAC Controller with Integrated 10/100 PHY
0
0
0
0
0
0
1
0
0
1
1
1
1
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
Acknowledge Match
Acknowledge Match Fail
Consistency Match
Consistency Match Fail
Parallel Detects Signal_ link_ ready
Parallel Detects Signal_ link_ ready Fail
Auto-negotiation Completed Successfully
Description
DM9000
30