DM9000A_06 DAVICOM [Davicom Semiconductor, Inc.], DM9000A_06 Datasheet - Page 31

• Manufacturer Part Number: DM9000A_06
• Description: Ethernet Controller with General Processor Interface
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

8.2 Basic Mode Status Register (BMSR) - 01
Final
Version: DM9000A-17-DS-F01
May 10, 2006
1.10-1.7
0.6-0.0
1.15
1.14
1.13
1.12
1.11
0.8
0.7
Bit
1.6
100BASE-TX
100BASE-TX
100BASE-T4
Duplex mode
MF preamble
Collision test
half-duplex
half-duplex
full-duplex
10BASE-T
full-duplex
10BASE-T
Bit Name
Reserved
Reserved
Default
0,RO/P
1,RO/P
1,RO/P
1,RO/P
1,RO/P
1,RW
0,RW
1,RO
0,RO
0,RO
Duplex Mode
1 = Full duplex operation. Duplex selection is allowed when
Auto-negotiation is disabled (bit 12 of this register is cleared).
With auto-negotiation enabled, this bit reflects the duplex
capability selected by auto-negotiation
0 = Normal operation
Collision Test
1 = Collision test enabled. When set, this bit will cause the
collision asserted during the transmit period.
0 = Normal operation
Reserved
Read as 0, ignore on write
100BASE-T4 Capable
1 = DM9000A is able to perform in 100BASE-T4 mode
0 = DM9000A is not able to perform in 100BASE-T4 mode
100BASE-TX Full Duplex Capable
1 = DM9000A is able to perform 100BASE-TX in full duplex
mode
0 = DM9000A is not able to perform 100BASE-TX in full
duplex mode
100BASE-TX Half Duplex Capable
1 = DM9000A is able to perform 100BASE-TX in half duplex
mode
0 = DM9000A is not able to perform 100BASE-TX in half
duplex mode
10BASE-T Full Duplex Capable
1 = DM9000A is able to perform 10BASE-T in full duplex
mode
0 = DM9000A is not able to perform 10BASE-TX in full
10BASE-T Half Duplex Capable
1 = DM9000A is able to perform 10BASE-T in half duplex
mode
0 = DM9000A is not able to perform 10BASE-T in half
duplex mode
Reserved
Read as 0, ignore on write
Frame Preamble Suppression
duplex mode
Ethernet Controller with General Processor Interface
Description
DM9000A
31