DM9000A_06 DAVICOM [Davicom Semiconductor, Inc.], DM9000A_06 Datasheet - Page 11

• Manufacturer Part Number: DM9000A_06
• Description: Ethernet Controller with General Processor Interface
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

5.2 EEPROM Interface
5.3 Clock Interface
5.4 LED Interface
5.5 10/100 PHY/Fiber
Final
Version: DM9000A-17-DS-F01
May 10, 2006
Pin No.
Pin No.
Pin No.
Pin No.
19
20
21
43
44
39
38
46
48
1
2
9
3
RXVDD25
TXVDD25
Pin Name
Pin Name
Pin Name
Pin Name
BGGND
BGRES
EEDIO
EECK
EECS
LED1
LED2
RX+
SD
X2
X1
I/O,PD IO Data to EEPROM
O,PD
O,PD
Type
Type
Type
Type
I/O
I/O
O
O
O
P
P
P
I
I
These pins are input ports at default.
Clock to EEPROM
This pin is also used as the strap pin of the polarity of the INT pin
When this pin is pulled high, the INT pin is low active; otherwise the INT pin is
high active
Chip Select to EEPROM
This pin is also used as a strap pin to define the internal memory data bus
width. When it is pulled high, the memory access bus is 8-bit; Otherwise it
is 16-bit.
Speed LED
Its low output indicates that the internal PHY is operated in 100M/S, or it
is floating for the 10M mode of the internal PHY.
This pin also acts as ISA bus IO16 defined in EEPROM setting in 16-bit
mode.
Link / Active LED
In LED mode 1, it is the combined LED of link and carrier sense signal of
the internal PHY
In LED mode 0, it is the LED of the carrier sense signal of the internal
PHY only
This pin also acts as ISA bus IOWAIT or WAKE defined in EEPROM
setting in 16-bit mode.
Fiber-optic Signal Detect
PECL signal, which indicates whether or not the fiber-optic receive pair is
receiving valid levels
Bandgap Ground
Bandgap Pin
2.5V power output for TP RX
2.5V power output for TP TX
TP RX Input
Crystal 25MHz Out
Crystal 25MHz In
Ethernet Controller with General Processor Interface
Description
Description
Description
Description
DM9000A
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