HY5PS1G421LM HYNIX [Hynix Semiconductor], HY5PS1G421LM Datasheet - Page 74

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HY5PS1G421LM

Manufacturer Part Number
HY5PS1G421LM
Description
1Gb DDR2 SDRAM(DDP)
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
Rev. 0.2 / Oct. 2005
* : tRAS(min) , tRC(min) specification for DDR2-400 4-4-4 is 45ns, 60ns respectively.
Exit active power down to read
command
Exit active power down to read
command
(Slow exit, Lower power)
CKE minimum pulse width
(high and low pulse width)
Average periodic Refresh
Interval
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down
mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down
mode)
ODT to power down entry
latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains
ON after CKE asynchronously
drops LOW
Parameter
tXARD
tXARDS
t
Symbol
t
AONPD
AOFPD
t
tANPD
t
tAXPD
tDelay
AOND
tREFI
AOFD
t
t
t
AON
tOIT
CKE
AOF
tIS+tCK+tIH
tAC(min)+2
tAC(min)+2
tAC(min)
tAC(min)
6 - AL
min
2.5
3
2
3
8
0
DDR2-400 3-3-3
2
tAC(max)+1
2.5tCK+tAC
tAC(max)+
2tCK+tAC
(max)+1
(max)+1
max
7.8
2.5
0.6
12
2
tAC(min)+2
tAC(min)+2
tIS+tCK+tI
tAC(min)
tAC(min)
6 - AL
min
2.5
H
DDR2-533 4-4-4
3
2
3
8
0
2
1HY5PS12421(L)M
tAC(max)+
tAC(max)+
2.5tCK+tA
2tCK+tAC
C(max)+1
(max)+1
HY5PS12821(L)M
max
7.8
2.5
0.6
12
2
1
tCK
us
Unit
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
Note
1, 2
16
17
15
1
74

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