HY5PS1G421LM HYNIX [Hynix Semiconductor], HY5PS1G421LM Datasheet - Page 60

• Manufacturer Part Number: HY5PS1G421LM
• Description: 1Gb DDR2 SDRAM(DDP)
• Manufacturer: HYNIX [Hynix Semiconductor]

Rev. 0.2 / Oct. 2005
5.2 DC & AC Logic Input Levels
5.2.1 Input DC Logic Leve
5.2.2 Input AC Logic Level
5.2.3 AC Input Test Conditions
Notes:
1.
2.
3.
V
V
SLEW
REF
SWING(MAX)
Symbol
Symbol
Symbol
V
Input waveform timing is referenced to the input signal crossing through the V
The input signal minimum slew rate is to be maintained over the range from V
from V
AC timings are referenced with input waveforms switching from VIL(ac) to VIH(ac) on the positive transitions and VIH(ac) to
VIL(ac) on the negative transitions.
V
V
V
IH
IH
IL
IL
(dc)
(ac)
(dc)
(ac)
IH(dc)
V
Falling Slew =
SWING(MAX)
to V
dc input logic high
dc input logic low
ac input logic high
ac input logic low
Input reference voltage
Input signal maximum peak to peak swing
Input signal minimum slew rate
IL(ac)
max for falling edges as shown in the below figure.
delta TF
Parameter
Parameter
V
REF
delta TF
Condition
- V
< Figure : AC Input Test Signal Waveform>
IL(ac)
l
max
V
V
REF
REF
- 0.3
Min.
Min.
+ 0.125
+ 0.250
-
V
V
0.5 * V
1.0
1.0
V
REF
REF
DDQ
delta TR
Value
Max.
Max.
- 0.125
- 0.250
-
DDQ
+ 0.3
Rising Slew =
REF
IL(dc)
V
V
V/ns
level applied to the device under test.
to V
Units
Units
Units
V
V
V
V
IH(ac)
V
min for rising edges and the range
IH(ac)
1HY5PS12421(L)M
delta TR
HY5PS12821(L)M
1
1
2, 3
min - V
Notes
Notes
Notes
V
V
V
V
V
V
V
DDQ
IH(ac)
IH(dc)
REF
IL(dc)
IL(ac)
SS
REF
max
max
min
min
60