HY5PS1G421LM HYNIX [Hynix Semiconductor], HY5PS1G421LM Datasheet - Page 18

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HY5PS1G421LM

Manufacturer Part Number
HY5PS1G421LM
Description
1Gb DDR2 SDRAM(DDP)
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
Rev. 0.2 / Oct. 2005
2.3.2.3 Off-Chip Driver (OCD) Impedance Adjustment
DDR2 SDRAM supports driver calibration feature and the flow chart below is an example of sequence. Every
calibration mode command should be followed by “OCD calibration mode exit” before any other command
being issued. MRS should be set before entering OCD impedance adjustment and ODT (On Die Termian-
tion) should be carefully controlled depending on system environment.
EMRS: OCD calibration mode exit
EMRS: OCD calibration mode exit
DQ & DQS High; DQS Low
BL=4 code input to all DQs
Enter Adjust Mode
Inc, Dec, or NOP
EMRS: Drive(1)
EMRS :
Start
Test
Need Calibration
MRS shoud be set before entering OCD impedance adjustment and ODT should
be carefully controlled depending on system environment
ALL OK
EMRS: OCD calibration mode exit
EMRS: OCD calibration mode exit
End
ALL OK
EMRS: OCD calibration mode exit
EMRS: OCD calibration mode exit
DQ & DQS Low; DQS High
BL=4 code input to all DQs
Enter Adjust Mode
Inc, Dec, or NOP
EMRS: Drive(0)
EMRS :
1HY5PS12421(L)M
Test
HY5PS12821(L)M
Need Calibration
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