HY5PS1G421LM HYNIX [Hynix Semiconductor], HY5PS1G421LM Datasheet - Page 73

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HY5PS1G421LM

Manufacturer Part Number
HY5PS1G421LM
Description
1Gb DDR2 SDRAM(DDP)
Manufacturer
HYNIX [Hynix Semiconductor]
Datasheet
Rev. 0.2 / Oct. 2005
Write postamble
Write preamble
Address and control input hold
time
Address and control input setup
time
Read preamble
Read postamble
Active to precharge command
Active to Read or Write
(with and without Auto-Precharge)
delay
Auto-Refresh to Active/Auto-
Refresh command period
Precharge Command Period
Active to Active/Auto-Refresh
command period
Active to active command period
for 1KB page size(x4,x8)
Active to active command period
for 2KB page size(x16)
CAS to CAS command delay
Write recovery time
Auto precharge write recovery +
precharge time
Internal write to read command
delay
Internal read to precharge
command delay
Exit self refresh to a non-read
command
Exit self refresh to a read
command
Exit precharge power down to any
non-read command
Parameter
tWPST
tWPRE
tIH
tIS
tRPRE
tRPST
tRAS
tRCD
tRFC
tRP
tRC
tRRD
tRRD
tCCD
tWR
tDAL
tWTR
tRTP
tXSNR
tXSRD
tXP
Symbol
tRFC + 10
WR+tRP
min
0.25
600
600
105
200
40*
55*
0.4
0.9
0.4
7.5
7.5
15
15
10
15
DDR2-400 3-3-3
2
2
2
70000
max
0.6
1.1
0.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
tRFC + 10
WR+tRP
min
500
500
105
200
0.4
0.25
0.9
0.4
7.5
7.5
45
15
15
60
10
15
DDR2-533 4-4-4
2
2
2
1HY5PS12421(L)M
HY5PS12821(L)M
70000
max
0.6
1.1
0.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ps
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
5,7,9
5,7,9
10
14
3
4
4
3
73

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