CMX625P4 CMLMICRO [CML Microcircuits], CMX625P4 Datasheet - Page 4

• Manufacturer Part Number: CMX625P4
• Description: ISDN TA POTS Interface
• Manufacturer: CMLMICRO [CML Microcircuits]

ISDN TA POTS Interface
1.3
2001 Consumer Microcircuits Limited
CMX625
Pin No.
D5/P4
Signal List
10
11
1
2
3
4
5
6
7
8
9
TE/NTE
RESET
Name
IRQN
FSC
DCL
SA0
SA1
SA2
DD
DU
DS
Signal
Type
O/P
I/P
I/P
I/P
I/P
I/P
I/P
I/P
I/P
BI
BI
The IOM-2 Frame Synchronisation Clock. This is an 8kHz
clock indicating the start of the frame. FSC is generated
by the upstream device.
1.5.3.
The IOM-2 Data Clock. It is used to clock data on and off
the bus and operates at 1.536MHz for Terminal mode
(TE) or 4.096MHz for non-Terminal mode (non-TE or Line
Card mode). DCL is generated by the upstream device.
When the bus is deactivated, DCL is held in a low state.
See section 1.5.1, 1.5.2 and 1.5.3.
The IOM-2 Data Downstream, receives data from the
network. When the bus is deactivated or when data is not
being transmitted, DD is high impedance. The IC Channel
Bus Reversal (TE mode only) allows IC1 and IC2 data to
be transmitted on the DD pin. See section 1.5.1, 1.5.2,
1.5.3 and 1.5.6. An external pull-up resistor is required.
The IOM-2 Data Upstream, transmits data to the network.
When the bus is deactivated or when data is not being
transmitted, DU is high impedance. The IC Channel Bus
Reversal (TE mode only) allows IC1 and IC2 data to be
received on the DU pin. See section 1.5.1, 1.5.2, 1.5.3
and 1.5.6. An external pull-up resistor is required.
The IOM-2 two modes of operation:
Terminal mode. NTE = 1 selects Non-Terminal mode or
Line Card mode. See section 1.5.1, 1.5.2 and 1.5.3.
) The IOM-2 Slot Address, provides one of 8 unique
) addresses. It allows the device to be individually
) addressed when more than one device is connected
) to the IOM-2 bus. See section 1.5.2 and 1.5.3.
The IOM-2 Device Select pin (NTE mode only). Allows two
CMX625 devices sharing a Slot Address to be individually
addressed. DS = 0 selects device one. DS = 1 selects
device two. See section 1.5.2 and 1.5.3.
The external reset pin clears all the registers. (RESET=1)
A ‘wire-Orable’ output Interrupt Request. This output is
pulled down to V
when inactive. An external pull-up resistor is required.
4
SS
when active and is high impedance
Description
See section 1.5.1, 1.5.2 and
TE = 0 selects
CMX625
D/625/2