CMX625P4 CMLMICRO [CML Microcircuits], CMX625P4 Datasheet - Page 12

• Manufacturer Part Number: CMX625P4
• Description: ISDN TA POTS Interface
• Manufacturer: CMLMICRO [CML Microcircuits]

ISDN TA POTS Interface
Figure 6 shows the monitor channel handshake procedure.
Figure 7 shows the maximum speed case for monitor handshake timing. The transmitter can be designed
for a higher data throughput than is provided by the general case. The transmitter can deactivate (high)
MX and transmit new data one frame after MR is deactivated. In this way, the transmitter is anticipating
that MR will be reactivated one frame after it is deactivated, minimising the delay between bytes. MR
being held inactive (high) for two or more frames indicates an abort is being signalled by the receiver.
The abort is a signal from the receiver to the transmitter indicating that data has been missed. The
receiver is able to abort a transmission by holding MR inactive (high) for two or more frames in response
to MX going active. An abort from the receiver will generate an interrupt when the INTERRUPT MASK
Register bit 2 is unmasked (logic ‘1’) and bit 2 of the Status Register will be set to ‘1’. Figure 8 shows a
monitor abort request from the receiver.
2001 Consumer Microcircuits Limited
Figure 7 Monitor Handshake Timing (maximum speed case)
Figure 6 Monitor Channel Handshake Procedure
Data
MR
MX
MX = Monitor Transmit Bit, active low.
MR = Monitor Receive Bit, active high.
MD = Monitor Data
Byte 1
ACK
Byte 2
12
ACK
Byte 3
ACK
Byte n
ACK
EOM
CMX625
D/625/2