ELANSC310 AMD [Advanced Micro Devices], ELANSC310 Datasheet - Page 63

• Manufacturer Part Number: ELANSC310
• Description: Single-Chip, 32-Bit, PC/AT Microcontroller
• Manufacturer: AMD [Advanced Micro Devices]

ISA BUS DESCRIPTIONS
The two bus configuration options (local bus or maxi-
mum ISA bus) each support a somewhat different sub-
set of the ISA bus standard. These subsets are defined
in Tables 33 and 34.
SA23–SA0
D15–D0
IOCHRDY
RSTDRV
MEMW
MEMR
IOW
IOR
AEN
TC
SYSCLK
IRQ1
PIRQ0
PIRQ1
DACK2
DRQ2
IOCS16
MCS16
IRQ14
SBHE
X1OUT
[BAUDOUT]
IOCHCHK
DRQ1
DACK1
DRQ5
DACK5
IRQ4
IRQ12
IRQ15
Pin Name
Table 33. ISA Bus Functionality
I/O
O
B
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
System Address Bus
System Data Bus
I/O Channel Ready
System Reset
Memory Write
Memory Read
I/O Write
I/O Read
DMA Address Enable
Terminal Count
System Clock (ISA bus timing is not
derived from this clock)
Interrupt IRQ1
Programmable IRQx
Programmable IRQx
DMA Channel 2 Acknowledge
DMA Channel 2 Request
I/O Device is 16 bits
Memory Device is 16 bits
Interrupt Request Input
Byte High Enable
Video Oscillator (14.336 MHz)/
Serial Port Output
ISA I/O Channel Check
DMA Channel 1 Request
DMA Channel 1 Acknowledge
DMA Channel 5 Request
DMA Channel 5 Acknowledge
Interrupt Request Input
Interrupt Request Input
Interrupt Request Input
Function
Élan™SC310 Microcontroller Data Sheet
P R E L I M I N A R Y
BALE
DRQ0
DRQ3
DRQ6
DRQ7
DACK0
DACK3
DACK6
DACK7
IRQ5
IRQ7
IRQ9
IRQ10
IRQ11
LA23–LA17
LMEG
0WS
Pin Name
Table 34. ISA Bus Functionality Lost when
Configured for Local Bus Mode
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
ISA Bus Address Latch Enable
DMA Channel 0 Request
DMA Channel 3 Request
DMA Channel 6 Request
DMA Channel 7 Request
DMA Channel 0 Acknowledge
DMA Channel 3 Acknowledge
DMA Channel 6 Acknowledge
DMA Channel 7 Acknowledge
Interrupt Request Input
Interrupt Request Input
Interrupt Request Input
Interrupt Request Input
Interrupt Request Input
ISA Non-Latched Address
ISA Memory Cycle Below 100000h
Zero Wait State Request
Function
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