ELANSC310 AMD [Advanced Micro Devices], ELANSC310 Datasheet - Page 33

• Manufacturer Part Number: ELANSC310
• Description: Single-Chip, 32-Bit, PC/AT Microcontroller
• Manufacturer: AMD [Advanced Micro Devices]

compatibility. In PC-compatible systems, this signal
can be driven by an 8042 keyboard controller, port 2,
bit 1.
For detailed information about the A20GATE signal,
see the Élan
GATEA20 Function Clarification Application Note,
order #21811.
RC
Reset CPU (Input; Active Low)
This signal resets the internal CPU. In PC-compatible
systems, this signal can be driven by a keyboard con-
troller, port 2, bit 0.
SYSCLK [XTCLK]
System Clock (Output)
This clock can be used to provide a clock to a keyboard
controller. It is not synchronous to ISA bus cycles.
XTCLK is the PC/XT keyboard clock. For information
about internal clock states, see Table 22 on page 45.
For information about the maximum ISA bus option,
see page 56.
PARALLEL PORT INTERFACE
ACK
Printer Acknowledge (Input; Active Low)
The printer asserts ACK to confirm that the transfer
from the ÉlanSC310 microcontroller to the parallel port
was successful.
AFDT [X14OUT]
Auto Line Feed Detect (Output; Active Low)
This pin signals the printer to autofeed continuous form
paper. It can be programmed to become a 14.336-MHz
output.
BUSY
Printer Busy (Input; Active High)
The printer asserts BUSY when it is performing an
operation.
ERROR
(Input; Active Low)
The printer asserts the ERROR signal to inform the
parallel port of a deselect condition, PE, or other error
condition.
INIT
Initialize Printer (Output; Active Low)
This pin signals the printer to begin an initialization rou-
tine.
TM
SC300 and ÉlanSC310 Microcontrollers
Élan™SC310 Microcontroller Data Sheet
P R E L I M I N A R Y
PE
Paper End (Input; Active High)
The printer asserts this signal when it is out of paper.
PPDWE [PPDCS]
Parallel Port Write Enable (Output; Active Low)
The PPDWE signal is used to control the 374 type latch
in a unidirectional parallel port design. To support a bi-
directional parallel port design, this pin can be reconfig-
ured (PPDCS) to act as an address decode for the
parallel port data port. It can then be externally gated
with IOR and IOW to provide the Parallel Port Data
Read and Write Strobes, respectively.
For more information, see “Parallel Port” on page 51.
PPOEN
Parallel Port Output Buffer Enable
(Output; Active Low)
This signal supports a bidirectional parallel port design.
It is used to control the output enable of the Parallel
Port Output Buffer.
SLCT
Printer Select Return (Input; Active High)
The printer asserts SLCT when it has been selected.
SLCTIN
Printer Selected (Output; Active Low)
Asserting SLCTIN selects the line printer.
STRB
Strobe (Output; Active Low)
Asserting STRB signals the line printer to latch data
currently on the parallel port.
SERIAL PORT INTERFACE
CTS
Clear To Send (Input; Active Low)
This signal indicates that the external serial device is
ready to accept data.
DCD
Data Carrier Detect (Input; Active Low)
This signal indicates to the internal serial port controller
that the attached serial device has detected a data car-
rier.
DSR
Data Set Ready (Input; Active Low)
This signal is used to indicate that the external serial
device is ready to establish a communication link with
the internal serial port controller.
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