AMD-762JLC AMD [Advanced Micro Devices], AMD-762JLC Datasheet - Page 82
AMD-762JLC
Manufacturer Part Number
AMD-762JLC
Description
System Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AMD-762JLC.pdf
(122 pages)
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AMD-762™ System Controller Data Sheet
4.5.4
Table 27.
70
Notes:
Group
* This table contains preliminary information, which is subject to change.
1. T
2. Input SU and HLD times are with respect to the appropriate clock forward group input clock.
3. The synchronous signals include
4. This value is measured with respect to the rising edge of SYSCLKIN.
5. Test load = 25 pF.
forward clock, as measured at the package, with respect to the same clock edge.
T
forward clock, as measured at the package, with respect to different clock edges.
NB-SKEW-SAMEEDGE
NB-SKEW-DIFFEDGE
T
SAMEEDGE
T
DIFFEDGE
T
T
T
T
C
C
T
TO-PAD
T
TO-SYSCLK
T
M-SYSCLK
NB-SKEW-
NB-SKEW-
NB-SU
NB-HD
RISE
FALL
NB-SYSCLK-
NB-SETUP-
NB-HOLD-FRO
DATA
INCLK
Symbol
AMD Athlon™ Processor System Bus/AMD-762™ System Controller AC Specification
AMD Athlon™ Processor System Bus Timings
is the maximum skew within a clock-forwarded group between any two signals or between any signal and its
is the maximum skew within a clock-forwarded group between any two signals or between any signal and its
Output skew with respect to
the same clock edge
Output skew with respect to a
different clock edge
Input Data Setup Time
Input Data Hold Time
Signal or Clock Rise Time
Signal or Clock Fall Time
Data Pin Capacitance
Input Clock Capacitance
SYSCLK to Synchronous Signal
Output at Pad (CONNECT,
CLKFWDRST)
Input Setup Time for
Synchronous Signal to SYSCLK
(PROCRDY)
Input Hold Time for
Synchronous Signal to SYSCLK
(PROCRDY)
Table 27 shows the AMD Athlon processor system bus timings.
Parameter Description
PROCREADY, CONNECT, and CLKFWDRST.
Preliminary Information
Electrical Data
Minimum
2400
1500
1200
500
800
–
–
1
1
4
4
Nominal
–
–
–
–
–
–
–
–
–
–
–
Maximum
4800
1025
400
12
12
–
–
3
3
–
–
24416C—December 2001
Units
V/ns
V/ns
pF
pF
ps
ps
ps
ps
ps
ps
ps
Chapter 4
Notes
4, 5
4, 5
4, 5
1, 2
1, 2
1
1
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