HYS64T256020HU-3-A QIMONDA [Qimonda AG], HYS64T256020HU-3-A Datasheet - Page 5

• Manufacturer Part Number: HYS64T256020HU-3-A
• Description: 240-Pin Unbuffered DDR2 SDRAM Modules
• Manufacturer: QIMONDA [Qimonda AG]

1.2
The Qimonda HYS[64/72]T256xxxHU–[3/…/5]–A module
family are unbuffered DIMM modules “UDIMMs with 30,0 mm
height based on DDR2 technology. DIMMs are available as
non-ECC modules in 256M × 64 (2 GB), and as ECC
modules in 256M × 72 (2 GB) organization and density,
intended for mounting into 240-pin connector sockets.
The memory array is designed with 1-Gbit Double-Data-Rate-
Two (DDR2) Synchronous DRAMs. Decoupling capacitors
1) All part numbers end with a place code, designating the silicon die revision. Example: HYS64T256020HU–3.7–A, indicating Rev. “A” dies
2) The Compliance Code is printed on the module label and describes the speed grade, for example “PC2–4200U–444–11–B1”, where
Rev. 1.32, 2006-09
03062006-5RK8-1X8J
Product Type
PC2-5300
HYS64T256020HU–3–A
HYS72T256020HU–3–A
PC2-5300
HYS64T256020HU–3S–A
HYS72T256020HU–3S–A
PC2-4200
HYS64T256020HU–3.7–A
HYS72T256020HU–3.7–A
PC2–3200
HYS64T256020HU-5-A
HYS72T256020HU-5-A
are used for DDR2 SDRAM components. For all Qimonda DDR2 module and component nomenclature see
4200U means Unbuffered DIMM modules with 4.26 GB/sec Module Bandwidth and “444-11” means Column Address Strobe (CAS) latency
= 4, Row Column Delay (RCD) latency = 4 and Row Precharge (RP) latency = 4 using the latest JEDEC SPD Revision 1.1 and produced
on the Raw Card “B”.
1)
Description
Compliance Code
2GB 2R×8 PC2–5300U–444–11–E0
2GB 2R×8 PC2–5300U–444–11–G0
2GB 2R×8 PC2–5300U–555–12–E0
2GB 2R×8 PC2–5300U–555–12–G0
2GB 2R×8 PC2–4200U–444–11–B1
2GB 2R×8 PC2–4200U–444–11–B1
2GB 2R×8 PC2–3200U–333–11–B1
2GB 2R×8 PC2–3200U–333–11–B1
2)
5
Ordering Information for RoHS Compliant Products
are mounted on the PCB board. The DIMMs feature serial
presence detect based on a serial E
2-pin I
configuration data and are write protected; the second
128 bytes are available to the customer.
2
C protocol. The first 128 bytes are programmed with
Description
2 Ranks, Non-ECC
2 Ranks, ECC
2 Ranks, Non-ECC
2 Ranks, ECC
2 Ranks, Non-ECC
2 Ranks, ECC
2 Ranks, Non-ECC
2 Ranks, ECC
Unbuffered DDR2 SDRAM Modules
HYS[64/72]T256xxxHU–[3/…/5]–A
Chapter 6
2
PROM device using the
Internet Data Sheet
SDRAM
Technology
1 Gbit (×8)
1 Gbit (×8)
1 Gbit (×8)
1 Gbit (×8)
1 Gbit (×8)
1 Gbit (×8)
1 Gbit (×8)
1 Gbit (×8)
of this data sheet.
TABLE 4