HYS64T256020HU-3-A QIMONDA [Qimonda AG], HYS64T256020HU-3-A Datasheet - Page 17
HYS64T256020HU-3-A
Manufacturer Part Number
HYS64T256020HU-3-A
Description
240-Pin Unbuffered DDR2 SDRAM Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1.HYS64T256020HU-3-A.pdf
(61 pages)
- Current page: 17 of 61
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3.2
1) DRAM Component Case Temperature is the surface temperature in the center on the top side of any of the DRAMs.
2) Within the DRAM Component Case Temperature Range all DRAM specifications will be supported
3) Above 85 °C DRAM Case Temperature the Auto-Refresh command interval has to be reduced to
4) Self-Refresh period is hard-coded in the DRAMs and therefore it is imperative that the system ensures the DRAM is below 85 °C Case
5) Up to 3000 m.
1) Under all conditions,
2) Peak to peak AC noise on
3) Input voltage for any connector pin under test of 0 V ≤
Rev. 1.32, 2006-09
03062006-5RK8-1X8J
Parameter
Operating temperature (ambient)
DRAM Case Temperature
Storage Temperature
Barometric Pressure (operating & storage)
Operating Humidity (relative)
Parameter
Device Supply Voltage
Output Supply Voltage
Input Reference Voltage
SPD Supply Voltage
DC Input Logic High
DC Input Logic Low
In / Output Leakage Current
Temperature before initiating Self-Refresh operation.
DC Operating Conditions
V
DDQ
must be less than or equal to
V
REF
may not exceed ± 2%
Symbol
VDD
VDDQ
VREF
VDDSPD
VIH (DC)
VIL (DC)
I
L
Values
Min.
1.7
1.7
0.49 x VDDQ
1.7
VREF + 0.125
– 0.30
– 5
V
V
REF (DC)
IN
V
Symbol
T
T
T
PBar
H
DD
OPR
CASE
STG
≤
OPR
V
DDQ
.
V
17
REF
Supply Voltage Levels and DC Operating Conditions
+ 0.3 V; all other pins at 0 V. Current is per pin
is also expected to track noise in
Nom.
1.8
1.8
0.5 x VDDQ
—
—
—
—
Values
Min.
0
0
– 50
+69
10
Max.
+65
+95
+100
+105
90
Unbuffered DDR2 SDRAM Modules
HYS[64/72]T256xxxHU–[3/…/5]–A
Max.
1.9
1.9
0.51 x VDDQ
3.6
VDDQ + 0.3
VREF – 0.125
5
t
REFI
V
= 3.9 µs
DDQ
Operating Conditions
.
Unit
°C
°C
°C
kPa
%
Internet Data Sheet
Unit
V
V
V
µA
V
V
V
TABLE 12
TABLE 13
Note
1)2)3)4)
5)
Note
1)
2)
3)
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