HYS64D32000HDL QIMONDA [Qimonda AG], HYS64D32000HDL Datasheet - Page 22

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HYS64D32000HDL

Manufacturer Part Number
HYS64D32000HDL
Description
200-Pin Small-Outline Dual-In-Line Memory Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
8) Fast slew rate ≥ 1.0 V/ns , slow slew rate ≥ 0.5 V/ns and < 1 V/ns for command/address and CK & CK slew rate > 1.0 V/ns, measured
9) These parameters guarantee device timing, but they are not necessarily tested on each device.
10) A maximun of eight Autorefresh commands can be posted to any given DDR SDRAM device
11) The specific requirement is that DQS be valid (HIGH,LOW, or some point on a valid transition) on or before this CK edge. A valid transition
12) The maximum limit for this parameter is not a device limit. The device operates with a greater value for this parameter, but system
Rev. 1.11, 2006-09
03292006-428D-USV0
between V
is defined as monotonic and meeting the input slew rate specificationsof the device. When no writes were previously in progress on the
bus, DQS will be transitioning from Hi-Z to logic LOW. If a previous write was in progress, DQS could be HIGH, LOW at this time, depending
on t
performance (bus turnaround) degrades accordingly.
DQSS
.
IH(ac)
and V
IL(ac)
.
24
HYS64D[32/64][000/020]HDL–[5/6]–C
Small-Outline DDR SDRAM Modules
Internet Data Sheet

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