HYS64D32000HDL QIMONDA [Qimonda AG], HYS64D32000HDL Datasheet - Page 16

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HYS64D32000HDL

Manufacturer Part Number
HYS64D32000HDL
Description
200-Pin Small-Outline Dual-In-Line Memory Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1) 0 °C ≤ T
2) DDR400 conditions apply for all clock frequencies above 166 MHz
3) Under all conditions, V
4) Peak to peak AC noise on V
5) V
6) Inputs are not recognized as valid until V
7) V
8) The ratio of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire temperature and
9) Values are shown per pin.
Rev. 1.11, 2006-09
03292006-428D-USV0
Parameter
Input High (Logic1) Voltage
Input Low (Logic0) Voltage
Input Voltage Level,
CK and CK Inputs
Input Differential Voltage,
CK and CK Inputs
VI-Matching Pull-up Current
to Pull-down Current
Input Leakage Current
Output Leakage Current
Output High Current, Normal
Strength Driver
Output Low Current, Normal
Strength Driver
must track variations in the DC level of V
voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the maximum difference between
pull-up and pull-down drivers due to process variation.
TT
ID
is the magnitude of the difference between the input level on CK and the input level on CK.
is not applied directly to the device. V
A
≤ 70 °C; V
DDQ
DDQ
= 2.5 V ± 0.2 V, V
must be less than or equal to V
REF
Symbol
V
V
V
V
VI
I
I
I
I
may not exceed ± 2% VREF (DC). VREF is also expected to track noise variations in V
I
OZ
OH
OL
IH(DC)
IL(DC)
IN(DC)
ID(DC)
Ratio
REF
REF
TT
DD
Min.
V
–0.3
–0.3
0.36
0.71
–2
–5
16.2
.
is a system supply for signal termination resistors, is expected to be set equal to V
stabilizes.
= +2.5 V ± 0.2 V; VDDQ = 2.6 V ± 0.1 V, VDD = +2.6 V ± 0.1 V (DDR400);
REF
+ 0.15
DD
.
Typ.
Values
18
Max.
V
V
V
V
1.4
2
5
–16.2
DDQ
REF
DDQ
DDQ
– 0.15
+ 0.3
+ 0.3
+ 0.6
HYS64D[32/64][000/020]HDL–[5/6]–C
Small-Outline DDR SDRAM Modules
Unit Note/Test Condition
V
V
V
V
µA
µA
mA
mA
6)
6)
6)
6)7)
8)
Any input 0 V ≤ V
All other pins not under test
= 0 V
DQs are disabled;
0 V ≤ V
V
V
OUT
OUT
=
= 0.35 V
9)
1.95 V
OUT
Internet Data Sheet
≤ V
DDQ
DDQ
IN
9)
.
≤ V
1)
REF
DD
;
, and

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