SSD1820ATR1 ETC1 [List of Unclassifed Manufacturers], SSD1820ATR1 Datasheet - Page 10

• Manufacturer Part Number: SSD1820ATR1
• Description: LCD Segment / Common Driver with Controller CMOS
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

RES
the chip is executed.
PS0
col between the driver and MCU. Refer to PS1 pin descriptions for
more details.
PS1
col between the driver and MCU according to the following table.
CS
command transfer only when CS is low.
D/C
the pin is high, the data written to the driver will be written into dis-
play RAM. When the pin is low, the data will be interpret as com-
mand. This pin must be connected to V
interface is used.
R/W(WR)
an 6800-series microprocessor, the signal indicates read mode
when high and write mode when low. When interfacing to an 8080-
microprocessor, a data write operation is initiated when R/W(WR)
is low and the chip is selected.
E(RD)
an 6800-series microprocessor, a data operation is initiated when
E(RD) is high and the chip is selected. When interfacing to an
8080-microprocessor, a data read operation is initiated when
E(RD) is low and the chip is selected.
D
the microprocessor’s data bus. When serial mode is selected, D
the serial data input SDA and D
INTRS
the voltage regulator when INTRS is high. When it is low, the exter-
nal resistors R
PS0
L
L
H
H
SSD1820A/21
10
0
This pin is reset signal input. When the pin is low, initialization of
This pin use together with PS1 to determine the interface proto-
This pin use together with PS0 to determine the interface proto-
This pin is chip select input. The chip is enabled for display data/
This input pin is to identify display data/command cycle. When
This pin is microprocessor interface signal. When interfacing to
This pin is microprocessor interface signal. When interfacing to
These pins are 8-bit bi-directional data bus to be connected to
This pin is an input pin to enable the internal resistors network for
-D
7
PS1
L
H
L
H
Interface
3-wire SPI (write only)
4-wire SPI (write only)
8080 parallel interface (read and write allowed)
6800 parallel interface (read and write allowed)
1
/R
REV 1.4
01/03
2
should be connected to V
PIN DESCRIPTIONS
6
is the serial clock input SCK.
SS
L6
, V
when 3-lines SPI
R
and V
S S
.
7
is
REF
used for the internal regulator. When it is high, an internal refer-
ence voltage source will be used. When it is low, an external refer-
ence voltage source must be provided in V
regulator is used.
V
V
V
age of generated V
or 6X) times V
V
supplied externally or generated by the internal DC-DC converter.
this pin is for internal reference only. It CANNOT be used for driv-
ing external circuitries.
C
capacitor(s) is/are connected among these pins.
V
plied externally or generated by the internal regulator.
V
internal resistors network for the voltage regulator is disabled
(INTRS is pulled low), external resistors should be connected
between V
tion circuit).
V
the internal voltage regulator when REF pin is pulled low.
DD
SS
CI
CC
L6
R
EXT
1 P
This pin is an input pin to enable the internal reference voltage
Power supply pin.
Ground.
Reference voltage input for internal DC-DC converter. The volt-
Note:
1.) voltage at this input pin must be larger than or equal to V
2.) 6X is avaliable for SSD1821 only.
This is the most positive voltage supply pin of the chip. It can be
When using internal DC-DC converter as generator, voltage at
When internal DC-DC voltage converter is used, external
This pin is the most positive LCD driving voltage. It can be sup-
This pin is an input of the internal voltage regulator. When the
This pin is an input to provide an external voltage reference for
, C
2 P
, C
SS
3 P
, C
and V
CI
with respect to V
4P
CC
, C
R
, and V
5P
equals to the multiple factor (2X, 3X, 4X, 5X
, C
1N
R
and C
and V
S S
.
2N
L6
, respectively (see applica-
EXT
pin if internal
SOLOMON
DD
.