IC42S16100-5T ICSI [Integrated Circuit Solution Inc], IC42S16100-5T Datasheet - Page 67
![no-image](/images/no-image-200.jpg)
IC42S16100-5T
Manufacturer Part Number
IC42S16100-5T
Description
512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
1.IC42S16100-5T.pdf
(78 pages)
- Current page: 67 of 78
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IC42S16100
Read Cycle / Page Mode
Integrated Circuit Solution Inc.
DR024-0D 06/25/2004
A0-A9
CAS latency = 3, burst length = 2
Note 1: A8,A9 = Don't Care.
DQM
CKE
RAS
CAS
CLK
A10
A11
WE
CS
I/O
t
CKS
t
CS
T0
t
t
t
t
t
t
t
t
CS
CS
CS
AS
AS
t
AS
CKA
CK
CH
BANK 1
BANK 0
<
ROW
ROW
ACT
T1
t
>
CHI
t
t
t
RCD
RAS
RC
t
t
t
t
t
t
AH
AH
CH
CH
CH
AH
T2
t
CL
T3
COLUMN m
<
NO PRE
BANK 1
BANK 0
READ
T4
>
(1)
t
CAC
t
CS
T5
t
QMD
COLUMN n
t
<
LZ
NO PRE
BANK 0
BANK 1
READ
T6
>
(1)
t
AC
t
CAC
T7
D
OUT
t
OH
m
t
AC
COLUMN o
AUTO PRE
<
<
NO PRE
BANK 0
READA
BANK 1
READ
T8
D
OUT
(1)
t
>
OH
m+1
>
t
AC
t
CAC
T9
D
OUT
t
OH
n
t
AC
BANK 0 AND 1
BANK 0 OR 1
T10
<
<
BANK 0
BANK 1
PALL
PRE
D
OUT
>
>
t
OH
n+1
t
t
RQL
t
RP
AC
t
CH
T11
D
OUT
t
OH
o
t
AC
T12
Undefined
Don’t Care
D
OUT
t
OH
o+1
t
HZ
67
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