IC42S16100-5T ICSI [Integrated Circuit Solution Inc], IC42S16100-5T Datasheet - Page 35
IC42S16100-5T
Manufacturer Part Number
IC42S16100-5T
Description
512K x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM
Manufacturer
ICSI [Integrated Circuit Solution Inc]
Datasheet
1.IC42S16100-5T.pdf
(78 pages)
- Current page: 35 of 78
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IC42S16100
Clock Suspend
When the CKE pin is dropped from HIGH to LOW during a
read or write cycle, the IC42S16100 enters clock suspend
mode on the next CLK rising edge. This command reduces
the device power dissipation by stopping the device internal
clock. Clock suspend mode continues as long as the CKE
pin remains low. In this state, all inputs other than CKE pin
are invalid and no other commands can be executed. Also,
the device internal states are maintained. When the CKE
pin goes from LOW to HIGH clock suspend mode is
terminated on the next CLK rising edge and device operation
resumes.
Integrated Circuit Solution Inc.
DR024-0D 06/25/2004
Bank Active Command Interval
When the selected bank is precharged, the period trp has
elapsed and the bank has entered the idle state, the bank
can be activated by executing the active command. If the
other bank is in the idle state at that time, the active
command can be executed for that bank after the period
t
active state. When a bank active command has been
executed, a precharge command must be executed for
RRD
CAS latency = 3
CAS latency = 2, burst length = 4
has elapsed. At that point both banks will be in the
COMMAND
COMMAND
COMMAND
CLK
CLK
CKE
CLK
I/O
BANK ACTIVE (BANK 0)
BANK ACTIVE (BANK 0)
ACT 0
ACT 0
READ (BANK 0)
READ 0
t
t
RRD
RCD
D
OUT
CLOCK SUSPEND
BANK ACTIVE (BANK 1)
BANK ACTIVE (BANK 0)
0
READ 0
ACT 1
The next command cannot be executed until the recovery
period (t
Since this command differs from the self-refresh command
described previously in that the refresh operation is not
performed automatically internally, the refresh operation
must be performed within the refresh period (tref). Thus the
maximum time that clock suspend mode can be held is just
under the refresh cycle time.
that bank within the ACT to PRE command period (t
max). Also note that a precharge command cannot be
executed for an active bank before t
After a bank active command has been executed and the
trcd period has elapsed, read write (including auto-
precharge) commands can be executed for that bank.
D
OUT
1
CKA
) has elapsed.
D
OUT
2
D
OUT
3
RAS
(min) has elapsed.
RAS
35
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