S71AL016D SPANSION [SPANSION], S71AL016D Datasheet - Page 66

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S71AL016D

Manufacturer Part Number
S71AL016D
Description
Stacked Multi-Chip Product (MCP) Flash Memory and RAM
Manufacturer
SPANSION [SPANSION]
Datasheet

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2Mbit Type 2 SRAM
128K x 16 Static RAM
Common Features
Functional Description
Maximum Ratings
66
The 2Mbit Type 2 SRAM is a family of high-performance CMOS static RAMs orga-
nized as 128K words by 16 bits. These devices feature advanced circuit design to
provide ultra-low active current. This is ideal for providing More Battery Life™
(MoBL™) in portable applications such as cellular telephones. The devices also
have an automatic power-down feature that significantly reduces power con-
sumption by 80% when addresses are not toggling. The device can also be put
into standby mode reducing power consumption by more than 99% when dese-
lected (CE# High). The input/output pins (I/O0 through I/O15) are placed in a
high-impedance state when: deselected (CE# High), outputs are disabled (OE#
High), both Byte High Enable and Byte Low Enable are disabled (BHE#, BLE#
High), or during a write operation (CE# Low, and WE# Low).
Writing to the device is accomplished by taking Chip Enable (CE#) and Write En-
able (WE#) inputs Low. If Byte Low Enable (BLE#) is Low, then data from I/O
pins (I/O0 through I/O7), is written into the location specified on the address pins
(A0 through A16). If Byte High Enable (BHE#) is Low, then data from I/O pins
(I/O8 through I/O15) is written into the location specified on the address pins (A0
through A16).
Reading from the device is accomplished by taking Chip Enable (CE#) and Output
Enable (OE#) Low while forcing the Write Enable (WE#) High. If Byte Low Enable
(BLE#) is Low, then data from the memory location specified by the address pins
will appear on I/O0 to I/O7. If Byte High Enable (BHE#) is Low, then data from
memory will appear on I/O8 to I/O15. See
read and write modes.
(Above which the useful life may be impaired. For user guidelines, not tested)
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Ambient Temperature with Power Applied . . . . . . . . . . . . . . -55°C to +125°C
Supply Voltage to Ground Potential . . . . . . . . . . . . . . -0.5V to V
DC Voltage Applied to Outputs in High-Z State (note 2) . . -0.5V to V
DC Input Voltage (note 2) . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V
Output Current into Outputs (Low). . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
High Speed
— 55ns and 70ns availability
Ultra-low active power
— Typical active current: 1.5 mA @ f = 1MHz
— Typical active current: 7 mA @ f = fmax (70ns speed)
Low standby power
Easy memory expansion with CE and OE features
Automatic power-down when deselected
CMOS for optimum speed/power
2Mbit Type 2 SRAM
P r e l i m i n a r y
Table 1
for a complete description of
CCmax
CC
CC
SRAM_Type04_04A0 August 4, 2004
+ 0.5V
+ 0.5V
+ 0.5V

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