AT52BR6408A ATMEL [ATMEL Corporation], AT52BR6408A Datasheet - Page 12

• Manufacturer Part Number: AT52BR6408A
• Description: 64-Mbit Flash, 8-Mbit SRAM (x16 I/O)
• Manufacturer: ATMEL [ATMEL Corporation]

Command Definition in (Hex)
Notes:
12
Command Sequence
Read
Chip Erase
Plane Erase
Sector Erase
Word Program
Enter Single-pulse Program
Mode
Single-pulse Word Program
Mode
Sector Softlock
Sector Unlock
Sector Hardlock
Erase/Program Suspend
Erase/Program Resume
Product ID Entry
Product ID Exit
Product ID Exit
Program Protection
Register – Block B
Lock Protection
Register – Block B
Status of Block B
Protection
Set Configuration Register
CFI Query
7. For the 64-Mbit Bottom Boot:
1. The DATA FORMAT in each bus cycle is as follows: I/O15 - I/O8 (Don’t Care); I/O7 - I/O0 (Hex). The ADDRESS FORMAT in each bus cycle
2. Since A11 is a Don’t Care, AAA can be replaced with 2AA.
3. Either one of the Product ID Exit commands can be used.
4. SA = sector address. Any word address within a sector can be used to designate the sector address (see pages 14 - 17 for details).
5. Once a sector is in the Hardlock protection mode, it cannot be disabled unless the chip is reset or power cycled.
6. PA is the plane address (A21 - A20).
8. If data bit D1 is “0”, block B is locked. If data bit D1 is “1”, block B can be reprogrammed.
9. The default state (after power-up) of the configuration register is “00”.
AT52BR6408A(T)
is as follows: A11 - A0 (Hex), A11 - A21 (Don’t Care).
xxx = 0XX555 Status Read from Plane A
xxx = 1XX555 Status Read from Plane B
xxx = 2XX555 Status Read from Plane C
xxx = 3XX555 Status Read from Plane D
(3)
(3)
Cycles
Bus
1
6
6
6
4
6
1
6
2
6
1
1
3
3
1
4
4
4
4
1
Addr
Addr
PA
Addr
X55
555
555
555
555
555
555
555
555
555
555
555
555
555
555
xxx
xxx
(6)
1st Bus
Cycle
D
Data
D
AA
AA
AA
AA
AA
AA
AA
AA
B0
AA
AA
FX
AA
AA
AA
AA
30
98
OUT
IN
(1)
AAA
SA
Addr
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
For the 64-Mbit Top Boot:
xxx = 3XX555 Status Read from Plane A
xxx = 2XX555 Status Read from Plane B
xxx = 1XX555 Status Read from Plane C
xxx = 0XX555 Status Read from Plane D
2nd Bus
(4)
(2)
Cycle
Data
55
55
55
55
55
55
70
55
55
55
55
55
55
55
xxx
Addr
555
555
555
555
555
555
555
555
555
555
555
555
(7)
3rd Bus
Cycle
Data
C0
C0
80
80
80
A0
80
80
80
90
F0
90
E0
Addr
Addr
Addr
555
555
555
555
555
555
080
xxx
80
4th Bus
Cycle
00/01
D
Data
OUT
D
D
AA
AA
AA
AA
AA
AA
X0
IN
IN
(8)
(9)
Addr
AAA
AAA
AAA
AAA
AAA
AAA
5th Bus
Cycle
Data
55
55
55
55
55
55
3425A–STKD–1/04
SA
SA
SA
Addr
PA
555
555
(4)(5)
(6)
(4)
(4)
6th Bus
Cycle
Data
A0
10
20
30
40
60