9UMS9001AKLF IDT [Integrated Device Technology], 9UMS9001AKLF Datasheet

no-image

9UMS9001AKLF

Manufacturer Part Number
9UMS9001AKLF
Description
PC MAIN CLOCK - CK540
Manufacturer
IDT [Integrated Device Technology]
Datasheet
PC MAIN CLOCK - CK540
Recommended Application:
Calistoga Based Ultra-Mobile PC (UMPC)
Output Features:
Pin Configuration
IDT
®
2 - CPU Low Power differential push-pull pairs
1 - ITP low power differential push-pull pair
4 - SRC low power differential push-pull pairs
1 - LCD100 SSCD low power differential
push-pull pair
1 - DOT96 low power differential push-pull
pair
3 - PCI, 33MHz
1 - USB, 48MHz
1 - REF, 14.31818MHz
PC MAIN CLOCK - CK540
VDDREFIO_3.3 3
VDDIO_PCI3.3 10
TEST_MODE 8
PCI_STOP# 9
TEST_SEL 7
GNDPCI 14
SDATA 5
PCI_F2 13
SCLK 6
REF0 4
PCI0 11
PCI1 12
X2 1
X1 2
56 55 54 53 52 51 50 49 48 47 46 45 44 43
15 16 17 18 19 20 21 22 23 24 25 26 27 28
ICS9UMS9001
56-pin MLF
1
Features/Benefits:
Supports Dothan ULV CPUs with 100 and
133 MHz CPU outputs
Dedicated TEST/SEL and TEST/MODE pins
saves isolation resistors on pins
PCI_SRC and CPU STOP inputs for power
manangment
Fully integrated Vreg
Integrated series resistors on differential
outputs
Supports split rail operation for maximum
power savings
Also runs from single 3.3V rail
1.05V-3.3V support for differential VDDIO
42 CLKREQ2#
41 CLKREQ3#
40 VDDCORE_3.3
39 SRC3T_LPRS
38 SRC3C_LPRS
37 SRC2T_LPRS
36 SRC2C_LPRS
35 VDDIO_SRC
34 GNDSRC
33 SRC1T_LPRS
32 SRC1C_LPRS
31 SRC0T_LPRS
30 SRC0C_LPRS
29 CKLREQ0#
9UMS9001
1247B—07/19/10

Related parts for 9UMS9001AKLF

9UMS9001AKLF Summary of contents

Page 1

PC MAIN CLOCK - CK540 Recommended Application: Calistoga Based Ultra-Mobile PC (UMPC) Output Features: • CPU Low Power differential push-pull pairs • ITP low power differential push-pull pair • SRC low power differential push-pull ...

Page 2

PC MAIN CLOCK - CK540 Pin Description PIN # PIN NAME VDDREFIO_3.3 4 REF0 5 SDATA 6 SCLK 7 TEST_SEL 8 TEST_MODE 9 PCI_STOP# 10 VDDIO_PCI3.3 11 PCI0 12 PCI1 13 PCI_F2 14 GNDPCI ...

Page 3

PC MAIN CLOCK - CK540 Pin Description (continued) PIN # PIN NAME 29 CKLREQ0# 30 SRC0C_LPRS 31 SRC0T_LPRS 32 SRC1C_LPRS 33 SRC1T_LPRS 34 GNDSRC 35 VDDIO_SRC 36 SRC2C_LPRS 37 SRC2T_LPRS 38 SRC3C_LPRS 39 SRC3T_LPRS 40 VDDCORE_3.3 41 CLKREQ3# 42 ...

Page 4

PC MAIN CLOCK - CK540 Functional Block Diagram X1 X2 CKPWRGD#/PD PCI_STOP# CPU_STOP# CLKREQ(3:0)# TESTMODE Power Groups Pin Number VDD3.3V VDDIO 1.05~3. 17 ® IDT PC MAIN CLOCK ...

Page 5

PC MAIN CLOCK - CK540 Table 1: CPU Frequency Select Table 1 1 CPU SRC MHz MHz B0b7 B0b6 0 0 133.33 100. Reserved 1 0 100.00 100. 200.00 ...

Page 6

PC MAIN CLOCK - CK540 Absolute Maximum Ratings PARAMETER SYMBOL Maximum Supply Voltage VDDxxx_3.3 Maximum Supply Voltage VDDxxx_1.8 Maximum Supply Voltage VDDxxx_IO Maximum Input Voltage V Minimum Input Voltage V Storage Temperature Ts Input ESD protection ESD prot Electrical ...

Page 7

PC MAIN CLOCK - CK540 AC Electrical Characteristics - Input/Common Parameters PARAMETER SYMBOL Clk Stabilization T STAB Tdrive_SRC T DRSRC Tdrive_PD# T DRPD Tdrive_CPU T DRSRC Tfall_PD# T Trise_PD Electrical Characteristics - Low Power Differential Outputs PARAMETER ...

Page 8

PC MAIN CLOCK - CK540 Electrical Characteristics - USB48MHz PARAMETER SYMBOL Long Accuracy ppm Clock period T period Absolute min/max period T Output High Voltage V Output Low Voltage V Output High Current I Output Low Current I Rising ...

Page 9

PC MAIN CLOCK - CK540 Electrical Characteristics - REF-14.318MHz PARAMETER SYMBOL Long Accuracy ppm Clock period T period Absolute min/max period T Output High Voltage V Output Low Voltage V Output High Current I Output Low Current I Rising ...

Page 10

PC MAIN CLOCK - CK540 2 General I C serial interface information for the 9UMS9001 How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • ...

Page 11

PC MAIN CLOCK - CK540 Byte 0 FS Readback, SS Enable, STOP Control Register Bit Pin Name 7 FSLC - 6 FSLB 5 CPU_SS_EN Spread spectrum enable for CPU/SRC/PCI outputs 4 LCD_Enable 3 SRC3_STOP 2 SRC2_STOP 1 SRC1_STOP 0 ...

Page 12

PC MAIN CLOCK - CK540 Byte 5 Drive Strength Control Register Bit Pin Name 7 PCI_F2 Strength 6 PCI1 Strength 5 PCI0 Strength 4 48MHz Strength 3 REF Strength 2 IO_VOUT2 IO Output Voltage Select (Most Significant Bit) 1 ...

Page 13

PC MAIN CLOCK - CK540 Test Clarification Table Comments Power-up w/ TEST_SEL = 1 to enter test mode Cycle power to disable test mode TEST_MODE -->low Vth input TEST_MODE is a real time input If TEST_SEL HW pin is ...

Page 14

... BASIC Ordering Information Part / Order Number Shipping Package 9UMS9001AKLF 9UMS9001AKLFT Tape and Reel “LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant. “A” is the device revision designator (will not correlate with the datasheet revision). ® ...

Page 15

PC MAIN CLOCK - CK540 Revision History Rev. Issue Date Who Description 1. Removed CK505 reference is Device ID byte of SMBus 2. Moved SMBus AFTER electrical characteristics 3. Made Data sheet Rev A device. A 8/28/2008 RDW 4. ...

Related keywords