ZL50057 ZARLINK [Zarlink Semiconductor Inc], ZL50057 Datasheet - Page 49

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ZL50057

Manufacturer Part Number
ZL50057
Description
12 K-Channel Digital Switch with High Jitter Tolerance, Per Stream Rate Conversion (2, 4, 8, 16, or 32 Mbps), and 48 Inputs and 48 Outputs
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet

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Figure 16, Backplane Port External High Impedance Control Timing (32 Mbps Mode) shows the channel control bits
for BCSTo0, BCSTo1, BCSTo2 and BCSTo3.
4.6
When the BORS input pin is HIGH, the Backplane Output Enable Bit (BE) of the Backplane Connection Memory
has direct per-channel control on the high impedance state of the Backplane output streams, BSTo0-31.
Programming a LOW state in the connection memory BE bit will set the stream output of the device to high
impedance for the duration of the channel period. See “Backplane Connection Memory Bit Definition,” on page 61
for programming details.
When the BORS signal is asserted HIGH, the BCSTo0-3 outputs directly the values given in BE.
BORS Asserted HIGH
(32 Mbps)
(32 Mbps)
(32 Mbps)
(32 Mbs)
BCSTo0
BCSTo1
BCSTo2
BCSTo3
BSTo0
BSTo3
BSTo2
BSTo1
FP8o
Figure 16 - Backplane Port External High Impedance Control Timing (32 Mbps Mode)
C8o
Channel 0
bits 7-0
Channel 0
bits 7-0
Channel 0
bits 7-0
Channel 0
bits 7-0
Zarlink Semiconductor Inc.
Channel 1
bits 7-0
Channel 1
bits 7-0
Channel 1
bits 7-0
Channel 1
bits 7-0
ZL50057/8
49
Channel 510
bits 7-0
Channel 510
bits 7-0
Channel 510
bits 7-0
Channel 510
bits 7-0
One C16o cycle
Channel 511
bits 7-0
Channel 511
bits 7-0
Channel 511
bits 7-0
Channel 511
bits 7-0
Data Sheet

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