AM29PDL640G AMD [Advanced Micro Devices], AM29PDL640G Datasheet - Page 36

• Manufacturer Part Number: AM29PDL640G
• Description: 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIOTM Control
• Manufacturer: AMD [Advanced Micro Devices]

Command Definitions Tables
Legend:
BA = Address of bank switching to autoselect mode, bypass mode, or
erase operation. Determined by A21:A19, see Tables 4 and 5 for more
detail.
PA = Program Address (A21:A0). Addresses latch on falling edge of
WE# or CE# pulse, whichever happens later.
PD = Program Data (DQ15:DQ0) written to location PA. Data latches
on rising edge of WE# or CE# pulse, whichever happens first.
Notes:
1.
2. All values are in hexadecimal.
3. Shaded cells in table denote read cycles. All other cycles are
4. During unlock and command cycles, when lower address bits are
5. No unlock or command cycles required when bank is reading
6. The Reset command is required to return to reading array (or to
7. Fourth cycle of autoselect command sequence is a read cycle.
34
Command (Notes)
Read (5)
Reset (6)
Autoselect
(Note 7)
Program
Chip Erase
Sector Erase
Program/Erase Suspend (11)
Program/Erase Resume (12)
CFI Query (13)
Accelerated Program (14)
Unlock Bypass Entry (15)
Unlock Bypass Program (15)
Unlock Bypass Erase (15)
Unlock Bypass CFI (13, 15)
Unlock Bypass Reset (15)
See Table 1 for description of bus operations.
write operations.
555 or 2AAh as shown in table, address bits higher than A11
(except where BA is required) and data bits higher than DQ7 are
don’t cares.
array data.
erase-suspend-read mode if previously in Erase Suspend) when
bank is in autoselect mode, or if DQ5 goes high (while bank is
providing status information).
System must provide bank address to obtain manufacturer ID or
device ID information. See
section for more information.
Manufacturer ID
Device ID (10)
SecSi Sector Factory
Protect (8)
Sector Group Protect
Verify (9)
Autoselect Command Sequence
Table 14. Memory Array Command Definitions
1
1
4
6
4
4
4
6
6
1
1
1
3
2
2
1
2
2
Addr Data Addr Data
XXX
555
555
555
555
555
555
555
555
RA
BA
XX
BA
XX
XX
XX
XX
55
RD
AA
AA
AA
AA
AA
AA
AA
AA
F0
B0
30
98
A0
A0
80
98
90
D A T A S H E E T
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
XX
XX
PA
PA
Am29PDL640G
PD
PD
55
55
55
55
55
55
55
55
10
00
(BA) 555
(BA) 555
(BA) 555
(BA) 555
Addr
555
555
555
555
RA = Read Address (A21:A0).
RD = Read Data (DQ15:DQ0) from location RA.
SA = Sector Address (A21:A12) for verifying (in autoselect mode) or
erasing.
WD = Write Data. See “Configuration Register” definition for specific
write data. Data latched on rising edge of WE#.
X = Don’t care
8. The data is 80h for factory locked and 00h for not factory locked.
9. The data is 00h for an unprotected sector group and 01h for a
10. Device ID must be read across cycles 4, 5, and 6.
11. System may read and program in non-erasing sectors, or enter
12. Program/Erase Resume command is valid only during Erase
13. Command is valid when device is ready to read array data or
14. WP#/ACC must be at V
15. Unlock Bypass Entry command is required prior to any Unlock
protected sector group.
autoselect mode, when in Program/Erase Suspend mode.
Program/Erase Suspend command is valid only during a sector
erase operation, and requires bank address.
Suspend mode, and requires bank address.
when device is in autoselect mode.
Bypass operation. Unlock Bypass Reset command is required to
return to the reading array.
Bus Cycles (Notes 1–4)
Data
A0
90
90
90
90
80
80
20
(BA)X00
(BA)X01
(SA)X02
Addr
X03
555
555
PA
note 8)
XX00/
XX01
Data
(see
ID
PD
AA
AA
01
7E
during the entire operation of command.
(BA)X0E
Addr
2AA
2AA
December 13, 2005
Data
15
55
55
(BA)X0F
Addr
555
SA
Data
01
10
30