DM74AS280N Fairchild Semiconductor, DM74AS280N Datasheet - Page 4
![IC PARITY GEN/CHKER 9BIT 14DIP](/photos/6/57/65733/261-14-dip_sml.jpg)
DM74AS280N
Manufacturer Part Number
DM74AS280N
Description
IC PARITY GEN/CHKER 9BIT 14DIP
Manufacturer
Fairchild Semiconductor
Series
74ASr
Datasheet
1.DM74AS280N.pdf
(6 pages)
Specifications of DM74AS280N
Logic Type
Parity Generator/Checker
Number Of Circuits
9-Bit
Current - Output High, Low
2mA, 20mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
14-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AS280
www.fairchildsemi.com
Typical Applications
Three DM74AS280s can be used to implement a 25-line
parity generator/checker.
As an alternative, the outputs of two or three parity genera-
tors/checkers can be decoded with a 2-input (AS86) or 3-
FIGURE 2. 81-Line Parity/Generator Checker
Parity/Generator Checker
FIGURE 1. 25-Line
4
input (S135) exclusive-OR gate for 18 or 27-line parity
applications.
Longer word lengths can be implemented by cascading
DM74AS280s. As shown in Figure 2, parity can be gener-
ated for word lengths up to 81 bits.