EVAL-CONTROLBRD2 AD [Analog Devices], EVAL-CONTROLBRD2 Datasheet - Page 5

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EVAL-CONTROLBRD2

Manufacturer Part Number
EVAL-CONTROLBRD2
Description
Differential Input, 1MSPS, 12-Bit ADC in ?SO-8 and S0-8
Manufacturer
AD [Analog Devices]
Datasheet
REV. PrJ
Pin No.
1
2
3
4
5
6
7
8
Pin Mnemonic
V
V
V
G N D
SDATA
SCLK
V
IN-
REF
IN+
D D
Reference Input for the AD7450. An external reference must be applied to this input. For a
5 V power supply, the reference is 2.5 V (±1%) and for a 3 V power supply, the reference is
1.25 V (±1%) for specified performance. This pin should be decoupled to GND with a
Positive Terminal for Differential Analog Input.
Negative Terminal for Differential Analog Input.
Analog Ground. Ground reference point for all circuitry on the AD7450. All analog input
signals and any external reference signal should be referred to this GND voltage.
Chip Select.
conversion on the AD7450 and framing the serial data transfer.
Serial Data. Logic Output. The conversion result from the AD7450 is provided on this
output as a serial data stream. The bits are clocked out on the falling edge of the SCLK
input. The data stream consists of four leading zeros followed by the 12 bits of conversion
data which are provided MSB first. The output coding is two’s complement.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part.
This clock input is also used as the clock source for the AD7450's conversion process.
Power Supply Input. V
GND with a 0.1µF Capacitor and a 10µF Tantalum Capacitor.
PRELIMINARY TECHNICAL DATA
Function
capacitor of at least 0.1µF. See the ‘Reference Section’ for more details.
PIN CONFIGURATION SOIC and µSOIC
V REF
V IN +
V IN -
GND
Active low logic input. This input provides the dual function of initiating a
PIN FUNCTION DESCRIPTION
2
3
4
1
DD
is 3 V (±10%) or 5 V (±5%). This supply should be decoupled to
TOP VIEW
(Not to Scale)
AD7450
– 5 –
8
6
7
5
V DD
S DATA
SCLK
AD7450

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