EVAL-ADV7320EB AD [Analog Devices], EVAL-ADV7320EB Datasheet - Page 33

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EVAL-ADV7320EB

Manufacturer Part Number
EVAL-ADV7320EB
Description
Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
Manufacturer
AD [Analog Devices]
Datasheet
Table 16. Registers 0x44 to 0x49
SR7–
SR0
0x44
0x45
0x46
0x47
0x48
0x49
1
NTSC color bar adjust should be set to 10 b for macrovision compliance (ADV7320 only).
Register
SD Mode
Register 3
Reserved
SD Mode
Register 4
SD Mode
Register 5
SD Mode
Register 6
SD Mode
Register 7
Bit Description
SD VSYNC -3H
SD RTC/TR/SCR
SD Active Video Length
SD Chroma
SD Burst
SD Color Bars
SD DAC Swap
NTSC Color Subcarrier
Adjust (Falling Edge of
HS to Start of Color
Burst)
SD PrPb Scale
SD Y Scale
SD Hue Adjust
SD Brightness
SD Luma SSAF Gain
Reserved
Reserved
Reserved
Reserved
Reserved
SD Double Buffering
SD Input Format
SD Digital Noise
Reduction
SD Gamma Control
SD Gamma Curve
SD Undershoot Limiter
Reserved
SD Black Burst Output on
DAC Luma
SD Chroma Delay
Reserved
Reserved
1
Bit 7
0
1
0
0
1
0
Bit 6
0
1
0
0
1
0
Bit 5
0
1
0
0
1
0
0
1
1
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Bit 4
0
1
0
1
0
0
1
1
0
1
0
1
Bit 3
0
1
0
1
0
1
0
1
0
1
Bit 2
0
0
1
1
0
1
0
1
0
Bit 1
0
1
0
1
0
0
1
1
0
1
0
0
0
1
1
Bit 0
0
1
0
1
0
1
0
1
0
0
1
0
1
Disabled
Disabled
Disabled
Disabled
0 must be written to this bit
0 must be written to this bit
0 must be written to this bit
0 must be written to this bit
8-bit input
16-bit input
10-bit input
20-bit input
Disabled
Disabled
0 must be written to this bit
Disabled
Disabled
0 must be written to this bit
0 must be written to this bit
Register Setting
Disabled
VSYNC = 2.5 lines (PAL),
VSYNC = 3 lines (NTSC)
Genlock disabled
Subcarrier Reset
Timing Reset
RTC enabled
720 pixels
710 (NTSC)/702 (PAL)
Chroma enabled
Chroma disabled
Enabled
Disabled
Enabled
DAC A = luma, DAC B = chroma
DAC A = chroma, DAC B = luma
5.17 μs
5.31 μs (default)
5.59 μs (must be set for
Macrovision compliance)
Reserved
Disabled
Enabled
Enabled
Disabled
Enabled
Enabled
Enabled
Disabled
Enabled
Disabled
Enabled
Enabled
Gamma Curve A
Gamma Curve B
−11 IRE
−6 IRE
−1.5 IRE
Enabled
4 clk cycles
8 clk cycles
Reserved
ADV7320/ADV7321
Reset
Values
0x00
0x00
0x01
0x00
0x00
0x00

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