EVAL-ADAU1401EB AD [Analog Devices], EVAL-ADAU1401EB Datasheet - Page 30

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EVAL-ADAU1401EB

Manufacturer Part Number
EVAL-ADAU1401EB
Description
SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
Manufacturer
AD [Analog Devices]
Datasheet
ADAU1401
Table 23. Parameter RAM Read/Write Format (Single Address)
Byte 0
chip_adr [6:0], W/R
Table 24. Parameter RAM Block Read/Write Format (Burst Mode)
Byte 0
chip_adr [6:0], W/R
Table 25. Program RAM Read/Write Format (Single Address)
Byte 0
chip_adr [6:0], W/R
Table 26. Program RAM Block Read/Write Format (Burst Mode)
Byte 0
chip_adr [6:0], W/R
Table 27. Control Register Read/Write Format (Core, Serial Out 0, Serial Out 1)
Byte 0
chip_adr [6:0], W/R
Table 28. Control Register Read/Write Format (RAM Configuration, Serial Input)
Byte 0
chip_adr [6:0], W/R
Table 29. Data Capture Register Write Format
Byte 0
chip_adr [6:0], W/R
1
2
Table 30. Data Capture (Control Port Readback) Register Read Format
Byte 0
chip_adr [6:0], W/R
Table 31. Safeload Address Register Write Format
Byte 0
chip_adr [6:0], W/R
Table 32. Safeload Data Register Write Format
Byte 0
chip_adr [6:0], W/R
progCount [10:0] is the value of the program counter when the data capture occurs (the table of values is generated by the SigmaStudio compiler).
regSel [1:0] selects one of four registers (see the 2074 to 2075 (0X081A to 0X081B)—Data Capture Registers section).
Byte 1
0000, data_capture_adr [11:8]
Byte 1
000000,
param_adr [9:8]
Byte 1
00000, prog_adr [10:8]
Byte 1
0000, safeload_adr [11:8]
Byte 1
0000, safeload_adr [11:8]
000000, param_adr [9:8]
Byte 1
00000, prog_adr [10:8]
Byte 1
Byte 1
0000, data_capture_adr [11:8]
Byte 1
0000, reg_adr [11:8]
Byte 1
0000, reg_adr [11:8]
Byte 2
param_adr [7:0]
Byte 2
safeload_adr [7:0]
Byte 2
prog_adr [7:0]
Byte 2
data_capture_adr [7:0]
Rev. 0 | Page 30 of 52
Byte 2
safeload_adr [7:0]
param_adr [7:0]
Byte 2
prog_adr [7:0]
Byte 2
Byte 3
0000, param [27:24]
Bytes [3:7]
prog [39:0]
Byte 3
00000000
<—param_adr—>
Byte 2
reg_adr [7:0]
Byte 2
reg_adr [7:0]
<—prog_adr—>
Byte 3
000, progCount [10:6]
Byte 2
data_capture_adr [7:0]
Byte 3
000000, param_adr [9:8]
Bytes [4:6]
param [23:0]
0000, param [27:24]
Byte 3
Bytes [3:7]
prog [39:0]
0000, data [27:24]
Byte 4
Byte 3
data [15:8]
Bytes [8:12]
prog_adr + 1
Bytes [7:10]
param_adr + 1
1
Byte 4
progCount [5:0]
Bytes [5:7]
data [23:0]
Byte 4
param_adr [7:0]
Bytes [4:6]
param [23:0]
Bytes [3:5]
data [23:0]
Byte 4
data [7:0]
Bytes [13:17]
prog_adr + 2
Byte 3
data [7:0]
Bytes [11:14]
param_adr + 2
1
, regSel [1:0]
2

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