EVAL-ADAU1401EB AD [Analog Devices], EVAL-ADAU1401EB Datasheet - Page 10

• Manufacturer Part Number: EVAL-ADAU1401EB
• Description: SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
• Manufacturer: AD [Analog Devices]

ADAU1401
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 11. Pin Function Descriptions
Pin No.
1, 37, 42
2
3
4
5
6
7
8
9
10
11
12, 25
13, 24
Mnemonic
AGND
ADC1
ADC_RES
ADC0
RESET
SELFBOOT
ADDR0
MP4
MP5
MP1
MP0
DGND
DVDD
Type
PWR
A_IN
A_IN
A_IN
D_IN
D_IN
D_IN
D_IO
D_IO
D_IO
D_IO
PWR
PWR
SELFBOOT
1
ADC_RES
ADDR0
RESET
AGND
DGND
ADC1
ADC0
MP4
MP5
MP1
MP0
Figure 7. 48-Lead LQFP Pin Configuration
Page No.
19
19
19
26
22
44
44
44
44
10
11
12
1
2
3
4
5
6
7
8
9
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24
PIN 1
INDICATOR
Rev. 0 | Page 10 of 52
Description
Analog Ground Pin. The AGND, DGND, and PGND pins can be tied directly
together in a common ground plane. AGND should be decoupled to an
AVDD pin with a 100 nF capacitor.
Analog Audio Input 1. Full-scale 100 μA
voltage level to be scaled with an external resistor. An 18 kΩ resistor gives a
2 V
ADC Reference Current. The full-scale current of the ADCs can be set with an
external 18 kΩ resistor connected between this pin and ground.
Analog Audio Input 0. Full-scale 100 μA
voltage level to be scaled with an external resistor. An 18 kΩ resistor gives a
2 V
Active Low Reset Input. Reset is triggered on a high-to-low edge, and the
ADAU1401 exits reset on a low-to-high edge. For more information about
initialization, see the Power-Up Sequence section.
Enable/Disable Self-Boot. SELFBOOT selects control port (low) or self-boot
(high). Setting this pin high initiates a self-boot operation when the ADAU1401
is brought out of a reset. This pin can be tied directly to the control voltage
or pulled up/down with a resistor.
I
ADAU1401s to be used on the same I
with a common SPI CLATCH signal.
Multipurpose GPIO or Serial Input Port LRCLK (INPUT_LRCLK).
Multipurpose GPIO or Serial Input Port BCLK (INPUT_BCLK).
Multipurpose GPIO or Serial Input Port Data 1 (SDATA_IN0).
Multipurpose GPIO or Serial Input Port Data 0 (SDATA_IN1).
Digital Ground Pin. The AGND, DGND, and PGND pins can be tied directly
together in a common ground plane. DGND should be decoupled to a
DVDD pin with a 100 nF capacitor.
1.8 V Digital Supply. This can be supplied either externally or generated
from a 3.3 V supply with the on-board 1.8 V regulator. DVDD should be
decoupled to DGND with a 100 nF capacitor.
2
ADAU1401
(Not to Scale)
C and SPI Address 0. In combination with ADDR1, this pin allows up to four
TOP VIEW
rms
rms
full-scale input.
full-scale input.
36
35
34
33
32
31
30
29
28
27
26
25
AVDD
PLL_LF
PVDD
PGND
MCLKI
OSCO
RSVD
MP2
MP3
MP8
MP9
DGND
2
C bus and up to two ICs to be used
rms
rms
input. Current input allows input
input. Current input allows input