EVAL-AD1934EB AD [Analog Devices], EVAL-AD1934EB Datasheet - Page 13

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EVAL-AD1934EB

Manufacturer Part Number
EVAL-AD1934EB
Description
8-Channel DAC with PLL, 192 kHz, 24 Bits
Manufacturer
AD [Analog Devices]
Datasheet
SERIAL CONTROL PORT
The AD1934 has an SPI control port that permits programming
and reading back of the internal control registers for the DACs
and clock system. There is also a standalone mode available for
operation without serial control that is configured at reset using
the serial control pins. All registers are set to default, except the
internal MCLK enable which is set to 1. Standalone mode only
supports stereo mode with I
clock rate. Table 11 shows the SPI control port pins logic state
when configured in standalone and SPI software control mode.
All four SPI control port pins need to be set to logic low for
standalone operation (see Table 11).It is recommended to use a
weak pull-up resistor on CLATCH in applications that have a
microcontroller. This pull-up resistor ensures that the AD1934
recognizes the presence of a microcontroller.
Table 11. SPI vs. Standalone Mode Configuration
Codec Control
SPI
Standalone
CLATCH
COUT
CCLK
CIN
t
COE
t
CLS
D23
2
COUT
OUT
0
S data format and 256 f
t
CCP
D22
t
COD
D9
S
D9
t
master
CCH
CIN
IN
0
Figure 9. Format of SPI Signal
t
t
CDS
CCL
D8
D8
Rev. 0 | Page 13 of 28
t
CDH
The SPI control port of the AD1934 is a 4-wire serial control
port. The format is similar to the Motorola SPI format except
the input data-word is 24 bits wide. The serial bit clock and
latch can be completely asynchronous to the sample rate of the
DACs. Figure 9 shows the format of the SPI signal. The first
byte is a global address with a read/write bit. For the AD1934,
the address is 0x04, shifted left 1 bit due to the R/ W bit. The
second byte is the AD1934 register address and the third byte
is the data.
CLATCH
1 (Pull-Up)
0
t
CLH
D0
D0
CCLK
IN
0
t
COTS
AD1934

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