AM79C983A Advanced Micro Devices, AM79C983A Datasheet - Page 33
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AM79C983A
Manufacturer Part Number
AM79C983A
Description
Integrated Multiport Repeater 2 (IMR2)
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C983A.pdf
(60 pages)
Available stocks
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Part Number
Manufacturer
Quantity
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Part Number:
AM79C983AKC
Manufacturer:
AMD
Quantity:
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Byte 0
Byte 1
TPn/SPn
Loopback Error Change Interrupt
Address:
If a port is connected to a MAU which does not loop-
back data from DO to DI during transmission that port
has a loopback error. For the error to be detected, the
network needs to be active and a packet transmitted
from the port. The corresponding bit is set to 1 when
the loopback error condition changes.
Pn/AUI/RAUI
Polarity Change Interrupt
Address:
The corresponding bit is set to 1 if the polarity of the
connected port is switched.
TPn/SPn
SQE Test Error Change Interrupt
Address:
If a port is connected to a MAU with SQE Test enabled
that port has an SQE Test Error. For the error to be de-
tected, the network needs to be active and a packet
must be transmitted from the port. The corresponding
bit on the register is set when the port changes from an
error state to a non-error state or from a non-error state
to an error state.
Pn/AUI/RAUI
Byte 0
Byte 1
Byte 0
Byte 1
D Port Read
TP7 TP6 TP5 TP4 TP3 TP2 TP1 TP0
SP3 SP2 SP1 SP0
MSB
MSB
MSB
D Port Read
D Port Read
P7
0
P7
0
1110 0011
1110 0100
1110 0101
P6
0
P6
0
1
0
0
1
0
1
1
0
P5
RAUI
P5
RAUI
No loopback error change
SQE Test Error change
Loopback error change
No SQE Test Error change
Link Test state changed
Link Test state unchanged
Polarity unchanged
Polarity changed
P4
AUI P11 P10 P9
P4
AUI P11 P10 P9
TP11 TP
P3
P3
P2
P2
10
TP9 TP8
P R E L I M I N A R Y
P1
P1
LSB
P0
P8
P0
P8
LSB
LSB
Am79C983A
Source Address Changed Interrupt
Address:
The corresponding bit in the register is set when the
source address of the incoming data packet matches
neither the Last Source Address Register nor the Pre-
ferred Source Address Register associated with the
port. The incoming packet must be an error-free packet.
Pn/AUI/RAUI/EP
Intruder Interrupt
Address:
A bit on the Intruder Interrupt Register is set when the
source address of an error-free incoming packet does not
match the corresponding Preferred Source Address Reg-
ister. The incoming packet must be an error-free packet.
Note: The Preferred Address attribute is programma-
ble and can be used to store the expected Node ID for
a port. If the appropriate interrupt is also enabled, then
a Source Address Changed can be used to alert the
network manager of an unauthorized access. This is
particularly useful for segments that are supposed to
be connected to a single station.
Pn/AUI/RAUI/EP
Source Address Match Interrupt
Address:
When the source address of an incoming packet from
any port matches the Source Address Match Register,
the appropriate bit is set. The received packet must be
an error-free packet.
Byte 0
Byte 1
Byte 0
Byte 1
Byte 0
Byte 1
D Port Read
D Port Read
P7
0
D Port Read
P7
0
MSB
P7
0
MSB
MSB
1110 0110
1110 0111
1110 1000
P6
EP
P6
EP
P6
EP
0
P5
RAUI
0
1
P5
RAUI
1
P5
RAUI
Source address changed on
No change
Intruder
Intruder
the incoming port
port unchanged
port changed
P4
AUI P11 P10 P9
P4
AUI P11 P10 P9
P4
AUI P11 P10 P9
P3
P3
P3
P2
P2
P2
status
status
P1
P1
P1
P0
P8
P0
P8
P0
P8
LSB
LSB
LSB
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