AM79C873 Advanced Micro Devices, AM79C873 Datasheet - Page 20

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AM79C873

Manufacturer Part Number
AM79C873
Description
NetPHY -1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support
Manufacturer
Advanced Micro Devices
Datasheet

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Basic Mode Control Register (BMCR) -
Register 0
20
0.15
0.14
0.13
0.12
0.11
0.10
Bit
Auto-Negotiation
Speed Selection
Power Down
Bit Name
Loopback
Enable
Isolate
Reset
0, RW/SC
(PHYAD=
Default
00000),
0, RW
1, RW
1, RW
0, RW
RW
P R E L I M I N A R Y
Reset:
1=Software reset
0=Normal operation
When set this bit configures the PHY status and control registers to their
default states. This bit will return a value of one until the reset process is
complete.
Loopback:
Loopback control register
1=Loopback enabled
0=Normal operation
When in 100M operation is selected, setting this bit will cause the
descrambler to lose synchronization. A 720ms “dead time” will occur
before any valid data appears at the MII receive outputs.
Speed Select:
1=100 Mbps
0=10 Mbps
Link speed may be selected either by this bit or by Auto-Negotiation if bit
12 of this register is set. When Auto-Negotiation is enabled, this bit will
return Auto-Negotiation link speed.
Auto-Negotiation Enable:
1= Auto-Negotiation enabled:
0= Auto-Negotiation disabled:
When auto-Negotiation is enabled bits 8 and 13 will contain the Auto-
Negotiation results. When Auto-Negotiation is disabled bits 8 and 13 will
determine the duplex mode and link speed.
Power Down:
1=Power Down
0=Normal Operation
Setting this bit will power down the NetPHY-1 device with the exception of
the crystal oscillator circuit.
Isolate:
1= Isolate
0= Normal Operation
When this bit is set the data path will be isolated from the MII interface.
TX_CLK, RX_CLK, RX_DV, RX_ER, RXD[3:0], COL and CRS will be
placed in a high impedance state. The management interface is not
effected by this bit. When the PHY Address is set to 00000 the isolate bit
will be set upon power-up/reset.
Am79C873
Description

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