AM79C873 Advanced Micro Devices, AM79C873 Datasheet - Page 10

• Manufacturer Part Number: AM79C873
• Description: NetPHY -1 10/100 Mbps Ethernet Physical Layer Single-Chip Transceiver with 100BASE-FX Support
• Manufacturer: Advanced Micro Devices

LNKSTS
Link Status Register Bit
This pin reflects the status of bit 2 register 1.
OPMODE0-OPMODE3
OPMODE0-OPMODE3
These pins are used to control the forced or advertised
operating mode of the NetPHY-1 device (see table be-
low). The value is latched into the NetPHY-1 device reg-
isters at power-up/rese..
10
MODE3
OP-
0
0
0
0
0
0
0
0
1
1
1
1
1
MODE2
OP-
0
0
0
0
1
1
1
1
0
0
0
0
1
MODE1
OP-
0
0
1
1
0
0
1
1
0
0
1
1
1
MODE0
OP-
0
1
0
1
0
1
0
1
0
1
0
1
1
Auto-Negotiation
enable with all
capabilities with
Flow Control
Auto-Negotiation
enable without all
capabilities without
Flow Control
Auto-Negotiation
100TX FDX with
Flow Control only
Auto-Negotiation
100TX FDX/HDX
without Flow
Control
Auto-Negotiation
10TP FDX with
Flow Control only
Auto-Negotiation
10TX FDX/HDX
without Flow
Control
Manual select
100TX FDX
Manual select
100TX HDX
Manual select
10TX FDX
Manual select
10TX HDX
Manual select
100FX FDX
Manual select
100FX HDX
Auto-Negotiation
10/100TX. HDX
only
Function
P R E L I M I N A R Y
Input
Output
Am79C873
RTPR/NODE
Repeater/Node Mode
When set high, this bit selects REPEATER mode; when
set low, it selects NODE. In REPEATER mode or
NODE mode with Full Duplex configured, the Carrier
Sense (CRS) output from the NetPHY-1 device will be
asserted only during receive activity. In NODE mode or
a mode not configured for Full Duplex operation, CRS
will be asserted during receive or transmit activity. At
power-up/reset, the value on this pin is latched into
Register 16, bit 11.
BPALIGN
Bypass Alignment
This pin allows 100 Mbps transmit and receive data
streams to bypass all of the transmit and receive oper-
ations when set high. At power-up/reset, the value on
this pin is latched into bit Register 16, bit 13.
BP4B5B
Bypass 4B5B Encoder/Decoder
This pin allows 100 Mbps transmit and receive data
streams to bypass the 4B to 5B encoder and 5B to 4B
decoder circuits when set high. At power-up/reset, the
value on this pin is latched into Register 16, bit 15.
BPSCR
Bypass Scrambler/Descrambler
This pin allows 100 Mbps transmit and receive data
streams to bypass the scrambler and descrambler cir-
cuits when set high. At power-up/reset, the value on
this pin is latched into Register 16, bit 14.
10BTSER
Serial/Nibble Select
10 Mbps Serial Operation:
When set high, this input selects a serial data transfer
mode. Manchester encoded transmit and receive data
is exchanged serially with a 10 MHz clock rate on the
least significant bits of the nibble-wide MII data buses,
pin TXD[0] and RXD[0] respectively. This mode is in-
tended for use with the NetPHY-1 device connected to
a device (MAC or Repeater) that has a 10 Mbps serial
interface. Serial operation is not supported in 100 Mbps
mode. For 100 Mbps, this input is ignored.
10 and 100 Mbps Nibble Operation:
When set low, this input selects the MII compliant nib-
ble data transfer mode. Transmit and receive data is ex-
changed in nibbles on the TXD[3:0] and RXD[3:0] pins
respectively.
At power-up/reset, the value on this pin is latched into
Register 18, bit 10.
Input
Input
Input
Input
Input