AK4524VF Asahi Kasei Microsystems, AK4524VF Datasheet - Page 12

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AK4524VF

Manufacturer Part Number
AK4524VF
Description
24BIT 96KHZ AUDIO CODEC
Manufacturer
Asahi Kasei Microsystems
Datasheet

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ASAHI KASEI
n System Clock Input
The master clock (MCLK) can be either a crystal resonator placed across the XTI and XTO pin, or external clock input to
the XTI pin with the XTO pin left floating. The master clock frequency can be selected by CMODE and CKS0-1 (Table 1).
The sampling speed (normal speed mode, double speed mode or four times speed monitor mode) is selected by DFS0-1
(Table 2). The ADC is powered down during four times speed monitor mode. The frequency of the master clock output
(CLKO) is the same as MCLK frequency and the output can be enabled or disabled by XTALE pin. When the CLKO
output is not used externally, it should be disabled.
When using a crystal oscillator, external loading capacitors (between XTI/XTO and DGND) are required.
In slave mode, the LRCK clock input must be synchronized with MCLK, however the phase is not critical. Internal timing
is synchronized to LRCK upon power-up. All external clocks must be present unless PD =”L” or all parts are powered
down by control register, otherwise excessive current may result from abnormal operation of internal dynamic logic. In
master mode, the clocks should be supplied by critical oscillation except for power down or the external clock (MCLK)
should not be stopped.
M0050-E-01
DFS1
0
0
1
1
1024fsn
MCLK
256fsn
512fsn
384fsn
768fsn
DFS0
0
1
0
1
* The frequency over 24.576MHz supports only external clock mode.
CMODE
11.2896MHz
22.5792MHz
45.1584MHz
16.9344MHz
33.8688MHz
fsn=44.1kHz
0
0
0
1
1
* X’tal mode operates from 11.2896MHz to 24.576MHz.
fsd=2 x fsn
fsq=4 x fsn
fsq=4 x fsn
* fsn is a sampling rate at normal speed mode.
fsn
Table 1. Master clock frequency select
CKS1
Table 3. Master clock frequency
OPERATION OVERVIEW
0
0
1
0
0
12.288MHz
24.576MHz
49.152MHz
18.432MHz
36.864MHz
fsn=48kHz
Table 2. Sampling speed
Sampling Rate
Normal speed
Double speed
4 times speed (SDTO=”L”)
4 times speed (SDTO=”L”)
- 12 -
CKS0
0
1
0
0
1
1024fsn
Normal
256fsn
512fsn
384fsn
768fsn
1024fsn
MCLK
256fsn
512fsn
384fsn
768fsn
Simple Decimation
Double
512fsd
256fsd
384fsd
N/A
N/A
Monitor mode
2 tap filter
at reset
-
-
4 times
128fsq
256fsq
192fsq
N/A
N/A
at reset
[AK4524]
1999/5

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